BINARY-PIXEL OPTICAL COMMUNICATION SYSTEMS
A binary-pixel optical communication system includes a binary-pixel display comprising binary display pixels operable to display a binary image and a binary-pixel camera comprising binary camera pixels disposed to optically receive the binary image and operable to record the binary image. The binary-pixel display and binary-pixel camera each include an array of single-bit storage circuits operable store a single bit of information corresponding to the binary image pixel and to receive or transmit a binary image pixel of the binary image. The binary-pixel display includes an array of light emitters each connected to a single-bit storage circuit forming a binary display pixel. The binary-pixel camera includes an array of photodetectors each connected to a single-bit storage circuit forming a binary camera pixel.
1 . A binary-pixel optical communication system, comprising:
a binary-pixel display comprising binary display pixels operable to display a binary image; and
a binary-pixel camera comprising binary camera pixels disposed to optically receive the binary image and operable to record the binary image.
2 . The binary-pixel optical communication system of claim 1 , wherein a number or a spatial resolution of the binary display pixels is spatially matched to a number or spatial resolution of the binary camera pixels, respectively.
3 . The binary-pixel optical communication system of claim 1 , wherein spatial resolution of the binary display pixels is geometrically similar to spatial resolution of the binary camera pixels.
4 . The binary-pixel optical communication system of claim 1 , wherein each of the binary display pixels is optically imaged to a different one of the binary camera pixels.
5 . The binary-pixel optical communication system of claim 1 , wherein, for at least one of the binary display pixels, the binary display pixel is optically imaged to at least one group of multiple, adjacent binary camera pixels.
6 . The binary-pixel optical communication system of claim 5 , wherein the multiple, adjacent binary camera pixels form a two-dimensional array.
7 . The binary-pixel optical communication system of claim 1 , wherein (i) the binary-pixel display is operable to display a binary image at a display frame rate and (ii) the binary-pixel camera comprises a camera sensor and a camera controller that is operable to control the camera sensor to record a binary image at a camera frame rate that is equal to or greater than the display frame rate.
8 . The binary-pixel optical communication system of claim 7 , wherein the camera frame rate is equal to or greater than twice the display frame rate.
9 . A display, comprising:
an array of single-bit storage circuits, each single-bit storage circuit operable to store a single bit of information corresponding to a binary image pixel of a binary image and output the stored single bit of information; and
an array of light emitters, wherein for each of the light emitters, the light emitter is connected to a single-bit storage circuit of the single-bit storage circuits and operable to emit light corresponding to the output from the single-bit storage circuit.
10 - 11 . (canceled)
12 . The display of claim 9 , comprising binary display pixels each comprising one of the light emitters and one of the single-bit storage circuits.
13 - 14 . (canceled)
15 . The display of claim 9 , comprising binary display pixels each comprising only one of the light emitters and only one of the single-bit storage circuits.
16 - 17 . (canceled)
18 . The display of claim 9 , wherein each light emitter in the array of light emitters is separately connected to a corresponding single-bit storage circuit of the single-bit storage circuits.
19 - 20 . (canceled)
21 . The display of claim 9 , comprising a display controller, wherein the single-bit storage circuits are separately connected to the display controller.
22 . The binary-pixel display of claim 9 , comprising a display substrate comprising a semiconductor, wherein (i) the array of single-bit storage circuits is native to the display substrate and (ii) the array of light emitters is disposed on and non-native to the display substrate.
23 . The binary-pixel display of claim 22 , wherein one or more of the single-bit storage circuits is disposed in an area over the display substrate defined by a convex hull of the array of light emitters.
24 . The binary-pixel display of claim 9 , comprising a display substrate comprising a semiconductor, wherein (i) the array of single-bit storage circuits is native to the display substrate and (ii) the array of light emitters is formed in or on and is native to the display substrate.
25 . The binary-pixel display of claim 9 , comprising a display substrate and wherein (i) the array of single-bit storage circuits is disposed on and is non-native to the display substrate and (ii) the array of light emitters is disposed on and non-native to the display substrate.
26 . The binary-pixel display of claim 25 , wherein one or more of the single-bit storage circuits in the array of single-bit storage circuits is disposed in an area over the display substrate defined by a convex hull of the array of light emitters.
27 . The binary-pixel display of claim 9 , wherein one or more of the single-bit storage circuits in the array of single-bit storage circuits comprise a micro-integrated circuit comprising a fractured or separated tether.
28 . A binary display pixel, comprising:
a single-bit storage circuit operable to receive a single bit of information and store the single bit of information; and
a light emitter responsive to the single bit of information stored in the single-bit storage circuit to emit light.
29 - 70 . (canceled)