IP Library › Patent Application 18905625
Patent Application
App. No. 18/905,625

SYSTEM AND METHOD FOR IN-NAND GARBAGE COLLECTION

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Quick Facts
Patent No.
US None
App. No.
18/905,625
Abstract

A method and memory device for performing a garbage collection operation. The memory device includes memory planes including first and second memory planes, each memory plane including memory blocks; and a processor including a checksum calculator to calculate checksum on valid page data of at least one victim block in the first memory plane. The processor is configured to: determine whether at least one target block in the first memory plane is open or full; determine whether the checksum is less than a checksum threshold; and selectively perform one of an internal garbage collection in the first memory plane and an external garbage collection outside the first memory plane, based on the determining whether the target block is open or full and the determining whether the checksum is less than the checksum threshold.

Claims (45)

1 . A memory device comprising:

a plurality of memory planes including first and second memory planes, each memory plane including a plurality of memory blocks; and

a processor including a checksum calculator to calculate checksum on valid page data of at least one victim block in the first memory plane,

wherein the processor is configured to:

determine whether at least one target block in the first memory plane is open or full;

determine whether the checksum is less than a checksum threshold; and

selectively perform one of an internal garbage collection in the first memory plane and an external garbage collection outside the first memory plane, based on the determining whether the target block is open or full and the determining whether the checksum is less than the checksum threshold.

2 . The memory device of claim 1 , wherein the processor is configured to:

when it is determined that the target block is open and that the calculated checksum is less than the checksum threshold, perform the internal garbage collection to move the valid page data of the victim block in the first memory plane into the target block in the first memory plane.

3 . The memory device of claim 2 , wherein the victim block is included in a victim superblock, and the target block is included in an inner target superblock, and

wherein each of the victim superblock and the inner target superblock includes one or more memory blocks of the first memory plane.

4 . The memory device of claim 3 , wherein the processor receives unit data from a memory controller, splits the unit data to generate multiple data entries corresponding to memory blocks of the victim superblock, and evenly stores the multiple data entries in the memory blocks as the victim block of the victim superblock.

5 . The memory device of claim 4 , wherein the valid page data includes the multiple data entries, and

the processor performs the internal garbage collection to move the multiple data entries equally into the target block in the first memory plane.

6 . The memory device of claim 1 , wherein the processor is configured to:

when it is determined that the target block is full, perform the external garbage collection to move the valid page data of the victim block in the first memory plane into an external open block in the second memory plane.

7 . The memory device of claim 6 , wherein the processor is configured to:

when it is determined that the target block is open and the calculated checksum is greater than or equal to the checksum threshold,

perform the external garbage collection to move the valid page data of the victim block in the first memory plane into the external open block in the second memory plane.

8 . The memory device of claim 7 , wherein the external open block is included in an external target superblock including one or more memory blocks of the second memory plane.

9 . The memory device of claim 8 , wherein the first memory plane and the second memory plane belong to a same memory die.

10 . The memory device of claim 8 , wherein the first memory plane and the second memory plane belong to a different memory die.

11 . A method for operating a memory device, which includes a plurality of memory planes and a processor including a checksum calculator, the method comprising:

determining whether at least one target block in a first memory plane among the plurality of memory planes is open or full;

determining whether checksum on valid page data of at least one victim block calculated by the checksum calculator is less than a checksum threshold; and

selectively performing one of an internal garbage collection in the first memory plane and an external garbage collection outside the first memory plane, based on the determining whether the target block is open or full and the determining whether the checksum is less than the checksum threshold.

12 . The method of claim 11 , wherein the selectively performing includes:

when it is determined that the target block is open and that the calculated checksum is less than the checksum threshold, performing the internal garbage collection to move the valid page data of the victim block in the first memory plane into the target block in the first memory plane.

13 . The method of claim 12 , wherein the victim block is included in a victim superblock, and the target block is included in an inner target superblock, and

wherein each of the victim superblock and the inner target superblock includes one or more memory blocks of the first memory plane.

14 . The method of claim 13 , further comprising:

receiving unit data from a memory controller,

splitting the unit data to generate multiple data entries corresponding to memory blocks of the victim superblock, and

evenly storing the multiple data entries in the memory blocks as the victim block of the victim superblock.

15 . The method of claim 14 , wherein the valid page data includes the multiple data entries, and

wherein the selectively performing includes:

performing the internal garbage collection to move the multiple data entries equally into the target block in the first memory plane.

16 . The method of claim 11 , wherein the selectively performing includes:

when it is determined that the target block is full, performing the external garbage collection to move the valid page data of the victim block in the first memory plane into an external open block in the second memory plane.

17 . The method of claim 16 , wherein the selectively performing includes:

when it is determined that the target block is open and the calculated checksum is greater than or equal to the checksum threshold,

performing the external garbage collection to move the valid page data of the victim block in the first memory plane into the external open block in the second memory plane.

18 . The method of claim 17 , wherein the external open block is included in an external target superblock including one or more memory blocks of the second memory plane.

19 . The method of claim 18 , wherein the first memory plane and the second memory plane belong to a same memory die.

20 . The method of claim 18 , wherein the first memory plane and the second memory plane belong to a different memory die.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2025
From: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
To: SK HYNIX INC.
Reel/Frame 070536/0574 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2024
From: HUANG, PENGFEI; ZHANG, FAN
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 068784/0112 →