Signal processing circuit
A signal processing circuit is provided that includes a capacitor coupled to a signal line to be coupled to a sensor, and coupled in series with the sensor, and a variable resistance circuit coupled in parallel with the capacitor. The variable resistance circuit and the capacitor form a high-pass filter that allows a signal having a cutoff frequency or higher to pass through the high-pass filter. In the variable resistance circuit, a resistance value is set to a first resistance value when a target signal having a peak component on a time axis is allowed to pass through the high-pass filter, and the cutoff frequency at the first resistance value is 1/10 or less of a frequency of the peak component.
1 . A signal processing circuit comprising:
a capacitor coupled in series to a signal line to be coupled to a sensor; and
a variable resistance circuit coupled in parallel with the signal line, the variable resistance circuit including a switched capacitor that includes a capacitor and a first switch,
wherein the variable resistance circuit and the capacitor form a high-pass filter that is configured to pass a frequency that is equal to or higher than a cutoff frequency,
wherein, in the variable resistance circuit, a resistance value is set to a first resistance value when a target signal having a peak component on a time axis is allowed to pass through the high-pass filter, and the cutoff frequency at the first resistance value is 1/10 or less of a frequency of the peak component, and
wherein the resistance value of the variable resistance circuit is set to a second resistance value that is lower than the first resistance value when the target signal does not pass through the high-pass filter.
2 . The signal processing circuit according to claim 1 , wherein the resistance value of the variable resistance circuit is set to a second resistance value that is lower than the first resistance value at all times except when the target signal is allowed to pass through the high-pass filter.
3 . The signal processing circuit according to claim 2 , wherein the variable resistance circuit includes a switched capacitor that includes the capacitor and the first switch.
4 . The signal processing circuit according to claim 3 , wherein the variable resistance circuit is configured to change the first resistance value to the second resistance value by increasing a switching frequency of the first switch.
5 . The signal processing circuit according to claim 1 , wherein the variable resistance circuit is configured to change the first resistance value to the second resistance value by increasing a switching frequency of the first switch.
6 . The signal processing circuit according to claim 5 , further comprising:
a buffer amplifier coupled in series with the variable resistance circuit and a reference voltage source; and
a second switch coupled in parallel with the buffer amplifier.
7 . The signal processing circuit according to claim 6 , wherein the buffer amplifier is set to:
OFF when the resistance value is set to the first resistance value, and
ON when the resistance value is set to the second resistance value.
8 . The signal processing circuit according to claim 7 , wherein the second switch is set to:
ON when the resistance value is set to the first resistance value, and
OFF when the resistance value is set to the second resistance value.
9 . The signal processing circuit according to claim 1 , wherein the variable resistance circuit is a variable resistor.
10 . The signal processing circuit according to claim 9 , further comprising:
a buffer amplifier coupled in series with the variable resistance circuit and a reference voltage source; and
a second switch coupled in parallel with the buffer amplifier.
11 . The signal processing circuit according to claim 10 , wherein the buffer amplifier is set to:
OFF when the resistance value is set to the first resistance value, and
ON when the resistance value is set to the second resistance value.
12 . The signal processing circuit according to claim 11 , wherein the second switch is set to:
ON when the resistance value is set to the first resistance value, and
OFF when the resistance value is set to the second resistance value.
13 . The signal processing circuit according to claim 1 , wherein the variable resistance circuit includes:
a resistor, and
a third switch coupled in parallel with the resistor,
wherein the first resistance value is changed to the second resistance value by turning on the third switch.
14 . The signal processing circuit according to claim 1 , further comprising:
a charge-voltage conversion circuit configured to convert a charge of the sensor into a voltage; and
an amplifier circuit configured to amplify the signal,
wherein the capacitor and the variable resistance circuit are disposed between the charge-voltage conversion circuit and the amplifier circuit.
15 . The signal processing circuit according to claim 1 , further comprising:
an amplifier circuit configured to amplify the signal; and
an A/D conversion circuit including an integrator circuit configured to perform an A/D conversion on the signal,
wherein the variable resistance circuit is disposed on an input side of the integrator circuit.
16 . The signal processing circuit according to claim 1 , wherein the sensor is a pressing sensor configured to detect a press operation.
17 . A signal processing circuit comprising:
a capacitor coupled in series to a signal line to be coupled to a sensor; and
a variable resistance circuit coupled in parallel with the signal line,
wherein the variable resistance circuit and the capacitor form a high-pass filter that is configured to pass a signal having a frequency that is equal to or higher than a cutoff frequency,
wherein, in the variable resistance circuit, a resistance value is set to a first resistance value when a target signal having a peak component on a time axis is allowed to pass through the high-pass filter, and the cutoff frequency at the first resistance value is 1/10 or less of a frequency of the peak component,
wherein the resistance value of the variable resistance circuit is set to a second resistance value that is lower than the first resistance value when the target signal does not pass through the high-pass filter, and
wherein the variable resistance circuit further-includes;
a resistor,
a third switch coupled in parallel with the resistor, and
a buffer amplifier coupled in series with the third switch,
wherein the first resistance value is changed to the second resistance value by turning on the third switch.
18 . The signal processing circuit according to claim 17 , wherein the buffer amplifier is set to:
OFF when the resistance value is set to the first resistance value, and
ON when the resistance value is set to the second resistance value.