IP Library › Granted Patent US 12,645,603
Granted Patent B2
US 12,645,603 · App. 18/972,375 · Granted Jun 2, 2026

Electronic device and operating method thereof

Inventors: Moongyung Kim (Suwon-si, KR); Youngsik Eom (Suwon-si, KR); Euiyeon Won (Suwon-si, KR); Donghyeon Ham (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F12/1027G06F12/1009
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Quick Facts
Patent No.
US 12,645,603
App. No.
18/972,375
Granted
Jun 2, 2026
Kind
B2
Abstract

An electronic device may include: a processor including a first core and a second core, the first core and the second core being configured to execute a process; and a main memory configured to store a page table corresponding to the process. The first core includes: a first translation lookaside buffer (TLB) configured to store a first portion of the page table; a page table walker configured to perform a page table walk operation to look up the page table; and a TLB check predictor configured to store a check weight table and, based on the check weight table, transmit a TLB check request to the second core. The second core includes a second TLB configured to store a second portion of the page table.

Claims (48)

1 . An electronic device comprising:

a processor comprising a first core and a second core, the first core and the second core being configured to execute a process; and

a main memory configured to store a page table corresponding to the process,

wherein the first core comprises:

a first translation lookaside buffer (TLB) configured to store a first portion of the page table;

a page table walker configured to perform a page table walk operation to look up the page table; and

a TLB check predictor configured to store a check weight table and, based on the check weight table, transmit a TLB check request to the second core,

wherein the second core comprises a second TLB configured to store a second portion of the page table,

wherein the first core is configured to translate a virtual address of the process into a physical address, based on a result of the page table walk operation and a TLB check response received from the second core, and

wherein the check weight table comprises the virtual address and a check weight value corresponding to the virtual address.

2 . The electronic device of claim 1 , wherein the second core is further configured to:

perform an operation of looking up the second TLB based on the TLB check request; and

transmit the TLB check response, which comprises a result of the operation of looking up the second TLB, to the first core.

3 . The electronic device of claim 2 ,

wherein in the second core is further configured to generate the TLB check response based on the TLB check request, and

wherein the TLB check predictor is further configured to:

increase the check weight value based on the TLB check response being generated based on occurrence of a TLB hit for the second TLB by the operation of looking up the second TLB by the second core; and

decrease the check weight value based on the TLB check response being generated based on occurrence of a TLB miss for the second TLB by the operation of looking up the second TLB by the second core.

4 . The electronic device of claim 3 , wherein the TLB check predictor is further configured to:

transmit the TLB check request to the second core based on the check weight value being a reference value or greater; and

not transmit the TLB check request to the second core based on the check weight value being less than the reference value.

5 . The electronic device of claim 1 , wherein

the page table walker is further configured to stop the page table walk operation based on the TLB check response being generated based on occurrence of a TLB hit for the second TLB as the second core looks up the second TLB.

6 . The electronic device of claim 1 , wherein

the process comprises at least one thread, and the at least one thread migrates from the second core to the first core.

7 . The electronic device of claim 1 , wherein

the TLB check predictor is further configured to generate the TLB check request, based on the check weight table, based on a TLB miss for the first TLB occurring as the first core looks up the first TLB.

8 . The electronic device of claim 1 , further comprising:

a coherent interconnect electrically connecting the first core, the second core, and the main memory.

9 . An operating method of an electronic device comprising a first core, a second core, and a main memory configured to execute processes, wherein the main memory comprises a page table, the first core comprises a first TLB configured to store a first portion of the page table, and the second core comprises a second TLB comprising a second portion of the page table, the operating method comprising:

looking up the first TLB, performed by the first core, based on a virtual address of a process;

looking up the page table, based on a result of the looking up the first TLB, by the first core;

performing an operation of looking up the second TLB, based on the result of the looking up the first TLB and a check weight table; and

translating the virtual address into a physical address, based on a result of the looking up the page table and a TLB check response received from the second core, by the first core,

wherein the check weight table comprises the virtual address and a check weight value corresponding to the virtual address.

10 . The operating method of claim 9 , wherein the performing the operation of looking up the second TLB comprises:

transmitting, by the first core, a TLB check request to the second core;

performing, by the second core, the operation of looking up the second TLB, based on the TLB check request; and

transmitting, by the second core, the TLB check request comprising a result of the operation of looking up the second TLB to the first core.

11 . The operating method of claim 10 , wherein the performing the operation of looking up the second TLB comprises:

generating the TLB check request, based on the check weight table, based on a TLB miss for the first TLB occurring as the first core looks up the first TLB.

12 . The operating method of claim 9 , further comprising:

increasing the check weight value based on the TLB check response being generated based on occurrence of a TLB hit for the second TLB as the second core looks up the second TLB; and

decreasing the check weight value based on the TLB check response being generated based on occurrence of a TLB miss for the second TLB as the second core looks up the second TLB.

13 . The operating method of claim 9 , wherein the performing the operation of looking up the second TLB comprises:

looking up the second TLB based on the check weight value being a reference value or greater.

14 . The operating method of claim 9 , wherein

the looking up the page table comprises stopping the looking up the page table based on a TLB hit for the second TLB occurring as the second core looks up the second TLB.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2024
From: KIM, MOONGYUNG; EOM, YOUNGSIK; WON, EUIYEON; HAM, DONGHYEON
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 069514/0470 →
Priority Claims (1)
KR 10-2024-0053545 · Apr 22, 2024 · national
Continuity (1)
Related Publication 20250328476A1 · Oct 23, 2025
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