IP Library › Granted Patent US 12,537,699
Granted Patent B1
US 12,537,699 · App. 18/979,115 · Granted Jan 27, 2026

Reconfigurable, high stability gate-tunneling physical unclonable function

Inventors: Matthew Douthwaite (Copenhagen, DK); Ranganathan Desikachari (Cambridge, GB); Matthew James Schormans (Cambridge, GB)
Assignee: Crypto Quantique Limited
H04L9/3278G06F30/36G06F30/373G06F30/38H03K19/018521H03K19/0948
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Quick Facts
Patent No.
US 12,537,699
App. No.
18/979,115
Granted
Jan 27, 2026
Kind
B1
Abstract

There is provided a circuit for a physical unclonable function comprising: first and second outputs; a cell comprising a plurality of CMOS devices; and a plurality of switching devices, the plurality of switching devices operable to connect a gate terminal of each of the plurality of CMOS devices to one of the first and second outputs, wherein a quantity of the plurality CMOS devices is a multiple of two, and wherein the circuit is configured such that each of the first and second output is connected to an equal quantity of the plurality of CMOS devices.

Claims (13)

1 . A circuit for a physical unclonable function comprising:

a first output and second output;

a cell comprising a plurality of CMOS devices; and

a plurality of switching devices, the plurality of switching devices operable to connect a gate terminal of each of the plurality of CMOS devices to one of the first output and the second output,

wherein a quantity of the plurality of CMOS devices is a multiple of two, and

wherein the circuit is configured such that each of the first output and the second output is connected to an equal quantity of the plurality of CMOS devices.

2 . The circuit of claim 1 , wherein the plurality of CMOS devices comprises four CMOS devices.

3 . The circuit of claim 1 , wherein each CMOS device of the plurality of CMOS devices has a substantially equal area.

4 . The circuit of claim 1 , wherein the plurality of switching devices are configured to maximize a magnitude of a difference between a current at the first output and a current at the second output.

5 . The circuit of claim 1 , wherein the cell comprises the plurality of switching devices.

6 . The circuit of claim 1 , wherein the plurality of switching devices is situated separately from the cell.

7 . The circuit of claim 1 , further comprising a plurality of cells, each cell of the plurality of cells comprising a respective plurality of switching devices.

8 . The circuit of claim 1 , further comprising a plurality of cells, wherein each cell of the plurality of cells is connected to the plurality of switching devices.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2025
From: DOUTHWAITE, MATTHEW; DESIKACHARI, RANGANATHAN; SCHORMANS, MATTHEW JAMES
To: CRYPTO QUANTIQUE LIMITED
Reel/Frame 072428/0776 →
References Cited (7)
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US 20160191255A1 · Haensch · 2016 [cited by examiner]
US 20190165938A1 · Lu · 2019 [cited by examiner]
B. Gao et al., “Concealable physically unclonable function chip with a memristor array,” Science Advances 8, Research Article, Jun. 17, 2022, pp. 1-9. (Year: 2022). [cited by examiner]
A. Zhao et al., “Purely Electrical Controllable Spin-Orbit Torque-Based Reconfigurable Physically Unclonable Functions,” Advanced Electronic Materials, 2023, pp. 1-7. (Year: 2023). [cited by examiner]