EXIT HISTORY BASED BRANCH PREDICTION
A method of branch prediction includes determining that a processor is to execute at least a portion of a first set of instructions. An address associated with a sequentially first instruction of the first set of instruction is determined, and a branch prediction index is determined based on the address and a branch history. A table is queried based on the branch prediction index to determine a predicted exit point of the first set of instructions. The processor fetches a subset of the first set of instructions based on the predicted exit point.
1 . A method comprising:
determining that a processor is to execute at least a portion of a first set of instructions;
determining an address associated with a sequentially first instruction of the first set of instruction;
determining a branch prediction index based on the address and a branch history;
querying a table based on the branch prediction index to determine a predicted exit point of the first set of instructions; and
fetching, by the processor, a subset of the first set of instructions based on the predicted exit point.
2 . The method of claim 1 , wherein the branch history includes fields that each represent a distance between a sequentially first instruction of a respective set of instructions and a respective previously-taken branch instruction.
3 . The method of claim 1 , wherein the branch prediction index is based on an exclusive-OR (XOR) function of the address and the branch history.
4 . The method of claim 1 , wherein the querying of the table includes receiving a count of fetch packets associated with the predicted exit point and an offset of the predicted exit point within a fetch packet.
5 . The method of claim 1 , wherein the querying of the table includes receiving an indication of a likelihood that a branch at the predicted exit point will be taken.
6 . The method of claim 5 further comprising updating the indication of likelihood based on whether the branch was taken.
7 . The method of claim 1 , wherein:
the subset of the first set of instructions is a first subset;
the first set of instructions includes a second subset between the first subset and a second set of instructions; and
the method further comprises determining, based on the predicated exit point, whether to fetch a subset of the second set of instructions after the first subset of the first set of instructions without fetching the second subset of the first set of instructions therebetween.
8 . The method of claim 7 further comprising, based on the predicted exit point, beginning execution of the second set of instructions prior to determining whether a branch associated with the predicted exit point will be taken.
9 . The method of claim 1 , wherein:
the branch prediction index is a first branch prediction index;
the branch history is a first branch history; and
the method further comprises:
executing a branch instruction of the first set of instructions; and
based on the branch instruction:
determining a second branch prediction index based on the address of the sequentially first instruction of the first set of instructions and a second branch history; and
storing fetch information associated with the branch instruction in the table using the second branch prediction index.
10 . The method of claim 9 , wherein the fetch information includes a count of fetch packets associated with the branch instruction and an offset of the branch instruction within a fetch packet.
11 . A circuit device comprising:
a processor configured to execute at least a portion of a first set of instructions, wherein the processor includes:
fetch circuitry; and
branch prediction circuitry that includes a table memory configured to store a table, wherein the branch prediction circuitry is configured to:
determine an address associated with the first set of instructions;
determine a branch prediction index based on the address and a branch history;
determine a predicted exit point of the first set of instructions based on querying the table using the branch prediction index; and
cause the fetch circuitry to fetch a subset of the first set of instructions from a memory, wherein the subset is based on the predicted exit point.
12 . The circuit device of claim 11 , wherein the branch history includes fields that each represent a distance between a sequentially first instruction of a respective set of instructions and a respective previously-taken branch instruction.
13 . The circuit device of claim 11 , wherein the branch prediction index is based on an exclusive-OR (XOR) function of the address and the branch history.
14 . The circuit device of claim 11 , wherein the branch prediction circuitry is configured to receive, from the table, a count of fetch packets associated with the predicted exit point and an offset of the predicted exit point within a fetch packet.
15 . The circuit device of claim 11 , wherein the branch prediction circuitry is configured to receive, from the table, an indication of a likelihood that a branch at the predicted exit point will be taken.
16 . The circuit device of claim 15 , wherein the processor is configured to update the indication of likelihood based on whether the branch was taken.
17 . The circuit device of claim 11 , wherein:
the subset of the first set of instructions is a first subset;
the first set of instructions includes a second subset between the first subset and a second set of instructions; and
the branch prediction circuitry is configured to determine, based on the predicted exit point, whether to cause the fetch circuitry to fetch a subset of the second set of instructions from the memory after the first subset of the first set of instructions without fetching the second subset of the first set of instructions therebetween.
18 . The circuit device of claim 17 , wherein the processor is configured to begin execution of the second set of instructions prior to determining whether a branch associated with the predicated exit point will be taken.
19 . The circuit device of claim 11 , wherein:
the branch prediction index is a first branch prediction index;
the branch history is a first branch history; and
the processor is configured to:
execute a branch instruction of the first set of instructions; and
based on the branch instruction:
determine a second branch prediction index based on the address associated with the first set of instructions and a second branch history; and
store fetch information associated with the branch instruction in the table using the second branch prediction index.
20 . The circuit device of claim 19 , wherein the fetch information includes a count of fetch packets associated with the branch instruction and an offset of the branch instruction within a fetch packet.