IP Library Granted Patent US 12,586,539
Granted Patent B2
US 12,586,539 · App. 19/017,150 · Granted Mar 24, 2026

Display apparatus

Inventors: Gyungsoon Park (Yongin-si, KR); Sunhwa Lee (Yongin-si, KR); Hyunjoon Kim (Yongin-si, KR); Jaeyong Jang (Yongin-si, KR); Kyunghoon Chung (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3266G09G3/3677H10K59/1213H10K59/1216H10K59/123H10K59/131G09G2310/0202
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Quick Facts
Patent No.
US 12,586,539
App. No.
19/017,150
Granted
Mar 24, 2026
Kind
B2
Abstract

A display apparatus includes a pixel part including a plurality of pixels, and a gate driving circuit. Each of the plurality of pixels is driven in one first scan period and one or more second scan periods during one frame in a driving mode driven at a first driving frequency lower than a maximum driving frequency.

Claims (116)

1 . A display apparatus comprising a plurality of pixels, each of the plurality of pixels comprising:

a first transistor;

a second transistor connected between a gate of the first transistor and a data line, a gate of the second transistor being connected to a first scan line;

a third transistor connected between the gate of the first transistor and a first voltage line, a gate of the third transistor being connected to a second scan line;

a fourth transistor connected between a second terminal of the first transistor and a second voltage line, a gate of the fourth transistor being connected to a third scan line;

a fifth transistor connected between a first terminal of the first transistor and a third voltage line, a gate of the fifth transistor being connected to a control line;

a first capacitor connected between the gate of the first transistor and the second terminal of the first transistor;

a second capacitor connected between the third voltage line and the second terminal of the first transistor;

a light-emitting diode comprising an anode connected to the second terminal of the first transistor; and

a sixth transistor connected between the anode and a fourth voltage line, a gate of the sixth transistor connected to a fourth scan line.

2 . The display apparatus of claim 1 , wherein

each of the plurality of pixels is driven in one first scan period and at least one second scan period during one frame in a driving mode driven at a first driving frequency lower than a maximum driving frequency,

a fourth second scan signal is supplied to the fourth scan line and a control signal is supplied to the control line according to the maximum driving frequency, and

a first scan signal is supplied to the first scan line and a second scan signal is supplied to the second scan line according to the first driving frequency.

3 . The display apparatus of claim 2 , wherein in case that the first driving frequency is 1/n of the maximum driving frequency,

each of a number of the first scan signal supplied to the first scan line and a number of the second scan signal supplied to the second scan line is 1,

each of a number of the fourth second scan signal supplied to the fourth scan line and a number of the control signal supplied to the control line is n, and

n is a natural number.

4 . The display apparatus of claim 3 , wherein

a third scan signal is supplied to the third line according to the maximum driving frequency, and

a number of the third scan signal supplied to the third scan line is n.

5 . The display apparatus of claim 2 , wherein a timing in which the third scan signal is supplied to the pixel in the first scan period and a timing in which the third scan signal is supplied to the pixel in the second scan period are substantially identical to each other.

6 . The display apparatus of claim 2 , wherein

the first scan period comprises a first non-light-emitting period and a first light-emitting period, and

each of the at least one second scan period comprises a second non-light-emitting period and a second light-emitting period.

7 . The display apparatus of claim 6 , wherein

the third scan signal is supplied to the third scan line before the first scan signal is supplied to the first scan line and the fourth scan signal is supplied to the fourth scan line after the first scan signal is supplied to the first scan line in the first non-light-emitting period of the first scan period,

the third scan signal is supplied to the third scan line and the fourth scan signal is supplied to the fourth scan line in the second non-light-emitting period of the second scan period,

a timing in which the third scan signal is supplied to the pixel in the first scan period and a timing in which the third scan signal is supplied to the pixel in the second scan period are substantially identical to each other, and

a timing in which the fourth scan signal is supplied to the pixel in the first scan period and a timing in which the fourth scan signal is supplied to the pixel in the second scan period are substantially identical to each other.

8 . The display apparatus of claim 6 , wherein

the first scan period comprises:

a first period in which the second scan signal and the third scan signal each have a gate-on voltage level, and the first scan signal, the fourth scan signal and the control signal each have a gate-off voltage level;

a second period in which the first scan signal, the third scan signal and the fourth scan signal each have a gate-off voltage level, and the second scan signal and the control signal each have a gate-on voltage level;

a third period in which the first scan signal has a gate-on voltage level, and the second scan signal, the third scan signal, the fourth scan signal and the control signal each have a gate-off voltage level;

a fourth period in which the first scan signal, the second scan signal, the third scan signal and the fourth scan signal each have a gate-off voltage level, and the control signal has a gate-on voltage level; and

a fifth period between the third period and the fourth period, in the fifth period the first scan signal, the second scan signal, the third scan signal and the control signal each have the gate-off voltage level, and the fourth scan signal has the gate-on voltage level, and

the fourth period is the first light-emitting period.

9 . The display apparatus of claim 8 , wherein

the at least one second scan period comprises a sixth period and a seventh period subsequent to the sixth period and before the control signal is shifted from the gate-off voltage level to the gate-on voltage level, in the second non-light-emitting period,

in the sixth period, the third scan signal has a gate-on voltage level and the first scan signal, the second scan signal, the fourth scan signal and the control signal each have a gate-off voltage level, and

in the seventh period, the fourth scan signal has a gate-on voltage level and the first scan signal, the second scan signal, the third scan signal and the control signal each have a gate-off voltage level.

10 . The display apparatus of claim 9 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level once in the second scan period.

11 . The display apparatus of claim 9 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the second scan period.

12 . The display apparatus of claim 1 , wherein each of the first transistor to the sixth transistor is an N-channel oxide semiconductor transistor.

13 . A pixel comprising:

a first transistor;

a second transistor connected between a gate of the first transistor and a data line, a gate of the second transistor being connected to a first scan line;

a third transistor connected between the gate of the first transistor and a first voltage line, a gate of the third transistor being connected to a second scan line;

a fourth transistor connected between a second terminal of the first transistor and a second voltage line, a gate of the fourth transistor being connected to a third scan line;

a fifth transistor connected between a first terminal of the first transistor and a third voltage line, a gate of the fifth transistor being connected to a control line;

a first capacitor connected between the gate of the first transistor and the second terminal of the first transistor;

a second capacitor connected between the third voltage line and the second terminal of the first transistor;

a light-emitting diode comprising an anode connected to the second terminal of the first transistor; and

a sixth transistor connected between the anode and a fourth voltage line, a gate of the sixth transistor connected to a fourth scan line.

14 . The pixel of claim 13 , wherein

the pixel is driven in one first scan period and at least one second scan period during one frame in a driving mode driven at a first driving frequency lower than a maximum driving frequency,

a fourth second scan signal is supplied to the fourth scan line and a control signal is supplied to the control line according to the maximum driving frequency, and

a first scan signal is supplied to the first scan line and a second scan signal is supplied to the second scan line according to the first driving frequency.

15 . The pixel of claim 14 , wherein in case that the first driving frequency is 1/n of the maximum driving frequency,

each of a number of the first scan signal supplied to the first scan line and a number of the second scan signal supplied to the second scan line is 1,

each of a number of the fourth second scan signal supplied to the fourth scan line and a number of the control signal supplied to the control line is n, and

n is a natural number.

16 . The pixel of claim 15 , wherein

a third scan signal is supplied to the third line according to the maximum driving frequency, and

a number of the third scan signal supplied to the third scan line is n.

17 . The pixel of claim 14 , wherein

the first scan period comprises a first non-light-emitting period and a first light-emitting period, and each of the at least one second scan period comprises a second non-light-emitting period and a second light-emitting period,

the first scan period comprises:

a first period in which the second scan signal and the third scan signal each have a gate-on voltage level, and the first scan signal, the fourth scan signal and the control signal each have a gate-off voltage level;

a second period in which the first scan signal, the third scan signal and the fourth scan signal each have a gate-off voltage level, and the second scan signal and the control signal each have a gate-on voltage level;

a third period in which the first scan signal has a gate-on voltage level, and the second scan signal, the third scan signal, the fourth scan signal and the control signal each have a gate-off voltage level;

a fourth period in which the first scan signal, the second scan signal, the third scan signal and the fourth scan signal each have a gate-off voltage level, and the control signal has a gate-on voltage level; and

a fifth period between the third period and the fourth period, in the fifth period the first scan signal, the second scan signal, the third scan signal and the control signal each have the gate-off voltage level, and the fourth scan signal has the gate-on voltage level,

the fourth period is the first light-emitting period,

the at least one second scan period comprises a sixth period and a seventh period subsequent to the sixth period and before the control signal is shifted from the gate-off voltage level to the gate-on voltage level, in the second non-light-emitting period,

in the sixth period, the third scan signal has a gate-on voltage level and the first scan signal, the second scan signal, the fourth scan signal and the control signal each have a gate-off voltage level, and

in the seventh period, the fourth scan signal has a gate-on voltage level and the first scan signal, the second scan signal, the third scan signal and the control signal each have a gate-off voltage level.

18 . The pixel of claim 17 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level once in the second scan period.

19 . The pixel of claim 17 , wherein

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the first scan period, and

the control signal is shifted from the gate-off voltage level to the gate-on voltage level twice in the second scan period.

20 . The pixel of claim 13 , wherein each of the first transistor to the sixth transistor is an N-channel oxide semiconductor transistor.

21 . A display apparatus comprising:

a display panel in which a plurality of pixels are arranged; and

a driving circuit providing signals to the plurality of pixels,

wherein each of the plurality of pixels comprises:

a first transistor;

a second transistor connected between a gate of the first transistor and a data line, a gate of the second transistor being connected to a first scan line;

a third transistor connected between the gate of the first transistor and a first voltage line, a gate of the third transistor being connected to a second scan line;

a fourth transistor connected between a second terminal of the first transistor and a second voltage line, a gate of the fourth transistor being connected to a third scan line;

a fifth transistor connected between a first terminal of the first transistor and a third voltage line, a gate of the fifth transistor being connected to a control line;

a first capacitor connected between the gate of the first transistor and the second terminal of the first transistor;

a second capacitor connected between the third voltage line and the second terminal of the first transistor;

a light-emitting diode comprising an anode connected to the second terminal of the first transistor; and

a sixth transistor connected between the anode and a fourth voltage line, a gate of the sixth transistor connected to a fourth scan line.

22 . The display apparatus of claim 21 , wherein

each of the plurality of pixels is driven in one first scan period and at least one second scan period during one frame in a driving mode driven at a first driving frequency lower than a maximum driving frequency,

the first scan period comprises a first non-light-emitting period and a first light-emitting period, and each of the at least one second scan period comprises a second non-light-emitting period and a second light-emitting period,

the first scan period comprises:

a first period in which the driving circuit provides the second scan signal and the third scan signal each having a gate-on voltage level, and the first scan signal, the fourth scan signal and the control signal each having a gate-off voltage level;

a second period in which the driving circuit provides the first scan signal, the third scan signal and the fourth scan signal each having a gate-off voltage level, and the second scan signal and the control signal each having a gate-on voltage level;

a third period in which the driving circuit provides the first scan signal having a gate-on voltage level, and the second scan signal, the third scan signal, the fourth scan signal and the control signal each having a gate-off voltage level;

a fourth period in which the driving circuit provides the first scan signal, the second scan signal, the third scan signal and the fourth scan signal each having a gate-off voltage level, and the control signal having a gate-on voltage level; and

a fifth period between the third period and the fourth period, in the fifth period, the driving circuit provides the first scan signal, the second scan signal, the third scan signal and the control signal each having a gate-off voltage level, and the fourth scan signal having a gate-on voltage level,

the fourth period is the first light-emitting period,

the at least one second scan period comprises a sixth period and a seventh period subsequent to the sixth period and before the control signal is shifted from the gate-off voltage level to the gate-on voltage level, in the second non-light-emitting period,

in the sixth period, the driving circuit provides the third scan signal having a gate-on voltage level and the first scan signal, the second scan signal, the fourth scan signal and the control signal each having a gate-off voltage level, and

in the seventh period, the driving circuit provides the fourth scan signal having a gate-on voltage level and the first scan signal, the second scan signal, the third scan signal and the control signal each having a gate-off voltage level.

23 . The display apparatus of claim 21 comprises one of a smartphone, a tablet personal computer, a laptop, a television and a billboard.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2025
From: PARK, GYUNGSOON; LEE, SUNHWA; KIM, HYUNJOON; JANG, JAEYONG; CHUNG, KYUNGHOON
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 069824/0767 →
Priority Claims (1)
KR 10-2021-0191839 · Dec 29, 2021 · national
Continuity (3)
Division 18502554 · Nov 6, 2023
Continuation 18089790 · Dec 28, 2022
Related Publication 20250148996A1 · May 8, 2025
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