Polyphase Filter Banks with Rational Decimation / Interpolation Factor
An Analysis Polyphase Filter (APPF) for shifting a selected passband of an input signal to a passband signal, having a Q=M·B/A decimation factor, B and A being co-primes, the APPF comprising M·B Paths. Each path includes (i) M·B/A multiplication Sub-paths, and (ii) a Sub-path Fusion Circuit, which is configured to generate fused multiplication products responsively to a sum of the multiplication n products generated by each of the multiplication sub-paths.
1 . An Analysis Polyphase Filter (APPF) for shifting a selected passband of an input signal to a passband signal, having a Q=M·B/A decimation factor, B and A being co-primes, the APPF comprising M·B Paths, each path comprising (i) M·B/A multiplication Sub-paths, and (ii) a Sub-path Fusion Circuit, which is configured to generate fused multiplication products responsively to a sum of the multiplication products generated by each of the multiplication sub-paths.
2 . The APPF according to claim 1 , further comprising an input circuit, configured to receive and temporarily store input samples of the input signal at a subsampling ratio of Q:1.
3 . The APPF according to claim 2 , wherein the input circuit comprises a commutator, configured to sample the input signal according to an input commutation indication.
4 . The APPF according to claim 1 , further comprising a circular output buffer, configured to output the fused multiplication products in a circular manner according to an output selection indication.
5 . The APPF according to claim 1 , further comprising an M-point Inverse-Fast-Fourier-Transform (IFFT) circuit, configured to convert the fused multiplication products into a polyphase-filtered output signal.
6 . The APPF according to claim 1 , further comprising a state engine, configured to generate an input commutation indication and an output selection indication.
7 . A Synthesis Polyphase Filter (SPPF) for shifting a baseband signal to a passband of an output signal, having a Q=M·B/A interpolation factor, B and A being co-primes, the SPPF comprising (i) M·B Paths, each path comprising M·B/A multiplication Sub-paths, and (ii) a Sub-path Expansion Circuit, which is configured to split multiplication products from the multiplication sub-paths.
8 . The SPPF according to claim 7 , further comprising an M-point Inverse-Fast-Fourier-Transform (IFFT) circuit, configured to perform an Inverse-Fourier-Transform of the baseband signal, thereby producing an IFFT-transformed baseband signal.
9 . The SPPF according to claim 8 , further comprising a Circular Output Buffer, configured to receive, buffer and periodically output the IFFT-transformed baseband signal according to an output selection indication.
10 . The SPPF according to claim 7 , further comprising a state engine, to generate an output selection indication.
11 . A Channelizer for shifting a passband in an input signal to a baseband signal, the channelizer comprising an Analysis polyphase Filter (APPF), having a Q=M·B/A decimation/interpolation factor, B and A being co-primes, the APPF comprising M·B Paths, each path comprising (i) M·B/A multiplication Sub-paths and (ii) a Sub-path Fusion Circuit, which is configured to generate fused multiplication products responsively to a sum of the multiplication products generated by each of the multiplication sub-paths.
12 . An Up-Converter for shifting a baseband signal to a passband within an output signal, the Up-Converter comprising a Synthesis Polyphase Filter (SPPF), having a Q=M·B/A decimation/interpolation factor, B and A being co-primes, the SPPF comprising M·B Paths, each path comprising (i) M·B/A multiplication Sub-paths and (ii) a Sub-path Expansion Circuit, which is configured to split multiplication products from the multiplication sub-paths.