DUAL SIDE DIRECT COOLING SEMICONDUCTOR PACKAGE
Implementations of a semiconductor package may include one or more power semiconductor die included in a die module; a first heat sink directly coupled to one or more source pads of the die module; a second heat sink directly coupled to one or more drain pads of the die module; a gate contact coupled with one or more gate pads of the die module; and a coating coupled directly to the die module. The gate contact may be configured to extend through an immersion cooling enclosure.
1 . A semiconductor package comprising:
one or more power semiconductor die comprised in a die module;
a first heat sink directly coupled to one or more source pads of the die module;
a second heat sink directly coupled to one or more drain pads of the die module; and
a gate contact coupled with one or more gate pads of the die module.
2 . The semiconductor package of claim 1 , wherein an N contact, a P contact, a source contact, a drain contact, and an alternating current out contact are each configured to extend through an immersion cooling enclosure.
3 . The semiconductor package of claim 1 , further comprising a second die module with one or more source pads directly coupled to the second heat sink and a third heat sink directly coupled to one or more drain pads of the second die module.
4 . The semiconductor package of claim 3 , further comprising a third die module with one or more source pads directly coupled to the third heat sink and a fourth heat sink directly coupled to one or more drain pads of the third die module.
5 . The semiconductor package of claim 4 , further comprising at least one direct current link capacitor electrically coupling at least a source contact and a drain contact.
6 . The semiconductor package of claim 1 , wherein a sintering material couples the first heat sink with the one or more source pads and the second heat sink with the one or more drain pads.
7 . The semiconductor package of claim 1 , wherein only a die module is used.
8 . The semiconductor package of claim 1 , wherein no substrate is included.
9 . A semiconductor package comprising:
one or more power semiconductor die comprised in a die module;
at least a first heat sink directly coupled to one or more source pads of the die module;
a drain contact coupled with one or more drain pads of the die module; and
a gate contact coupled with one or more gate pads of the die module.
10 . The semiconductor package of claim 9 , wherein the drain contact is coupled with a second heat sink directly coupled to the one or more drain pads of the die module.
11 . The semiconductor package of claim 10 , further comprising a second die module with one or more source pads directly coupled to the second heat sink and a third heat sink directly coupled to one or more drain pads of the second die module.
12 . The semiconductor package of claim 11 , further comprising a third die module with one or more source pads directly coupled to the third heat sink and a fourth heat sink directly coupled to one or more drain pads of the third die module.
13 . The semiconductor package of claim 12 , further comprising at least one direct current link capacitor electrically coupling at least a source contact and a drain contact.
14 . The semiconductor package of claim 9 , wherein a sintering material couples the first heat sink with the one or more source pads.
15 . A semiconductor package assembly comprising:
an immersion cooling enclosure comprising a dielectric coolant therein; and
a semiconductor package immersed in the dielectric coolant, the semiconductor package comprising:
one or more power semiconductor die comprised in a die module;
at least a first heat sink directly coupled to one or more source pads of the die module;
a drain contact coupled with one or more drain pads of the die module; and
a gate contact coupled with one or more gate pads of the die module.
16 . The semiconductor package assembly of claim 15 , wherein the drain contact is coupled with a second heat sink directly coupled to the one or more drain pads of the die module.
17 . The semiconductor package assembly of claim 16 , further comprising a second die module with one or more source pads directly coupled to the second heat sink and a third heat sink directly coupled to one or more drain pads of the second die module.
18 . The semiconductor package assembly of claim 17 , further comprising a third die module with one or more source pads directly coupled to the third heat sink and a fourth heat sink directly coupled to one or more drain pads of the third die module.
19 . The semiconductor package assembly of claim 18 , further comprising at least one direct current link capacitor electrically coupling at least a source contact and a drain contact.
20 . The semiconductor package assembly of claim 15 , wherein a sintering material couples the first heat sink with the one or more source pads.