IP Library › Granted Patent US 12,613,762
Granted Patent B1
US 12,613,762 · App. 19/142,130 · Granted Apr 28, 2026

Hot swap error reporting method, processor architecture, device and storage medium

Inventors: Tianyu Zhao (Suzhou, CN); Xiuqiang Sun (Suzhou, CN); Guozhi Han (Suzhou, CN); Peiyu Liu (Suzhou, CN); Chuang Chen (Suzhou, CN)
Assignee: SUZHOU METABRAIN INTELLIGENT TECHNOLOGY CO., LTD.
G06F11/0781G06F11/0745G06F11/0772G06F11/0775G06F11/0778G06F11/0784G06F11/079
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Quick Facts
Patent No.
US 12,613,762
App. No.
19/142,130
Granted
Apr 28, 2026
Kind
B1
Abstract

A method for reporting a hot-swap error, a processor architecture, a device, and a storage medium are provided by an embodiment of the present application. The method is applied to an advanced reduced instruction-set computer (RISC) machine (ARM) platform, the ARM platform includes a baseboard management controller (BMC), an operating system (OS), and a basic input output system (BIOS). Data transmission between the BMC and the OS is performed based on a data interface service configured via the BIOS. During operation of the ARM platform, in response to a system control processor (SCP) in the BIOS detecting a PCIe CE type reporting error information corresponding to any interface, the SCP transmits the PCIe CE type reporting error information to the BMC and the OS.

Claims (52)

1 . A method for reporting a hot-swap reporting error, wherein the method is applied to an advanced reduced instruction-set computer (RISC) machine (ARM) platform, the ARM platform comprises a baseboard management controller (BMC), an operating system (OS), and a basic input output system (BIOS); data transmission between the BMC and the OS is performed based on a data interface service configured via the BIOS; and the method comprises:

during operation of the ARM platform, in response to a system control processor (SCP) in the BIOS detecting peripheral component interconnect express correctable error (PCIe CE) type reporting error information corresponding to any interface, transmitting, by the SCP, the PCIe CE type reporting error information to the BMC and the OS;

triggering, by the OS, the BMC to collect device data;

determining, by the OS, whether the PCIe CE type reporting error information corresponding to the interface is hot-swap reporting error information based on the device data collected by the BMC, a reporting error status of the PCIe CE type reporting error information corresponding to the interface, and hot-swap reporting error parameters that are preset; and

in response to the PCIe CE type reporting error information being the hot-swap reporting error information, transmitting, by the OS, blocking information corresponding to the hot-swap reporting error information to the BMC.

2 . The method according to claim 1 , wherein after the in response to the PCIe CE type reporting error information being the hot-swap reporting error information, transmitting, by the OS, the blocking information corresponding to the hot-swap reporting error information to the BMC, the method further comprises:

in response to the blocking information corresponding to the hot-swap reporting error information, deleting, by the BMC, the hot-swap reporting error information.

3 . The method according to claim 1 , wherein the method further comprises:

collecting, by the BMC, the device data at preset intervals and transmitting the collected device data to the OS.

4 . The method according to claim 1 , wherein the hot-swap reporting error parameters comprise a hot-swap reporting error interval, and the determining, by the OS, whether the PCIe CE type reporting error information corresponding to the interface is the hot-swap reporting error information based on the device data collected by the BMC, the reporting error status of the PCIe CE type reporting error information corresponding to the interface, and the hot-swap reporting error parameters that are preset comprises:

for the PCIe CE type reporting error information corresponding to the interface, determining, by the OS, a reporting error duration between first reporting error time of the PCIe CE type reporting error information and last reporting error time of the PCIe CE type reporting error information; and

in response to the reporting error duration being less than the hot-swap reporting error interval and the OS, based on the device data collected by the BMC, determining that device change information exists on the interface within the reporting error duration, determining the PCIe CE type reporting error information corresponding to the interface as the hot-swap reporting error information, wherein the device change information comprises device addition or device removal.

5 . The method according to claim 1 , wherein the hot-swap reporting error parameters comprise a hot-swap reporting error threshold, and the determining, by the OS, whether the PCIe CE type reporting error information corresponding to the interface is the hot-swap reporting error information based on the device data collected by the BMC, the reporting error status of the PCIe CE type reporting error information corresponding to the interface, and the hot-swap reporting error parameters that are preset comprises:

for the PCIe CE type reporting error information corresponding to the interface, counting, by the OS, a quantity of reporting error times of the PCIe CE type reporting error information within a designated time period; and

in response to the quantity of reporting error times of the PCIe CE type reporting error information within the designated time period being less than the hot-swap reporting error threshold, and the OS, based on the device data collected by the BMC, determining that device change information exists on the interface within the designated time period, determining the PCIe CE type reporting error information corresponding to the interface as the hot-swap reporting error information, wherein the device change information comprises device addition or device removal.

6 . The method according to claim 1 , wherein the method further comprises: during startup of the ARM platform, registering, by the BIOS of the ARM platform, the data interface service on the OS and the BMC, wherein the data interface service is configured for providing a data transmission interface between the BMC and the OS via the BIOS.

7 . The method according to claim 6 , wherein the during the startup of the ARM platform, registering, by the BIOS of the ARM platform, the data interface service on the OS and the BMC comprises:

after a server of the ARM platform is powered on, registering, by the BIOS, the data interface service on the BMC;

after entering the OS, running a first hot-swap reporting error management program in the OS, and accessing, by the first hot-swap reporting error management program, the data interface service registered by the BIOS;

transmitting, by the OS, activation information to the BMC through the data transmission interface provided by the data interface service; and

in response to the activation information, starting, by the BMC, a second hot-swap reporting error management program stored in the BMC.

8 . The method according to claim 7 , wherein after the server of the ARM platform is powered on, the method further comprises:

transmitting, by the BIOS, hot-swap reporting error parameters currently stored by the BIOS to the BMC.

9 . The method according to claim 7 , wherein after the after entering the OS, running the first hot-swap reporting error management program in the OS, the method further comprises:

accessing and acquiring, by the first hot-swap reporting error management program, hot-swap reporting error parameters currently stored by the BIOS from the BIOS.

10 . The method according to claim 1 , wherein the method further comprises:

after a server of the ARM platform is powered on, detecting, by the BMC, whether the BMC stores hot-swap reporting error parameters obtained from the BIOS;

transmitting, by the BIOS, hot-swap reporting error parameters currently stored by the BIOS to the BMC and registering the data interface service, wherein the data interface service is configured for providing a data transmission interface between the BMC and the OS via the BIOS;

after entering the OS, running a first hot-swap reporting error management program in the OS, accessing, by the first hot-swap reporting error management program, the data interface service registered by the BIOS and acquiring the hot-swap reporting error parameters currently stored by the BIOS from the BIOS;

transmitting, by the OS, activation information to the BMC through the data transmission interface provided by the data interface service; and

in response to the activation information, starting, by the BMC, a second hot-swap reporting error management program stored in the BMC.

11 . The method according to claim 10 , wherein before entering the OS, the method further comprises:

monitoring, by the BIOS in real time, a modification operation for the hot-swap reporting error parameters; and

in response to a modification operation for the hot-swap reporting error parameters being detected, transmitting, by the BIOS, modified hot-swap reporting error parameters to the OS and the BMC, respectively.

12 . The method according to claim 7 , wherein before entering the OS, the method further comprises:

in response to a disable operation for a hot-swap reporting error setting option, transmitting, by the BIOS, hot-swap reporting disable information to the OS and the BMC, respectively;

in response to the hot-swap reporting disable information, stopping, by the OS, execution of the first hot-swap reporting error management program; and

in response to the hot-swap reporting disable information, stopping, by the BMC, execution of the second hot-swap reporting error management program.

13 . The method according to claim 1 , wherein the method further comprises:

during operation of the ARM platform, in response to a modification operation for hot-swap reporting error parameters, storing, by the OS, modified hot-swap reporting error parameters and transmitting the modified hot-swap reporting error parameters to the BIOS and the BMC, respectively.

14 . The method according to claim 13 , wherein during a next startup of the ARM platform, the method further comprises:

after a server of the ARM platform is powered on, transmitting, by the BIOS, modified hot-swap reporting error parameters stored by the BIOS to the BMC and the OS, respectively.

15 . The method according to claim 12 , wherein the method further comprises:

in response to an upgrade operation for a management program, acquiring, by the OS, a to-be-upgraded first hot-swap reporting error management program, and upgrading a current first hot-swap reporting error management program to the to-be-upgraded first hot-swap reporting error management program.

16 . The method according to claim 1 , wherein after the determining, by the OS, whether the PCIe CE type reporting error information corresponding to the interface is the hot-swap reporting error information based on the device data collected by the BMC, the reporting error status of the PCIe CE type reporting error information corresponding to the interface, and the hot-swap reporting error parameters that are preset, the method further comprises:

in response to the PCIe CE type reporting error information being not the hot-swap reporting error information, transmitting, by the OS, a normal processing information corresponding to the PCIe CE type reporting error information to the BMC; and

in response to the normal processing information corresponding to the PCIe CE type reporting error information, recording and reporting, by the BMC, the PCIe CE type reporting error information.

17 . The method according to claim 1 , wherein in response to the PCIe CE type reporting error information being the hot-swap reporting error information, the method further comprises:

storing, by the OS, the PCIe CE type reporting error information and a timestamp of the PCIe CE type reporting error information in a hot-swap summary list to facilitate summarizing and viewing all hot-swap reporting error information.

18 . A processor architecture, wherein the processor architecture comprises the BMC, the OS, and the BIOS, and the processor architecture is configured to perform the method for reporting the hot-swap reporting error according to claim 1 .

19 . A computing device, comprising at least one processor and a memory, the memory storing a computer program capable of executing on the at least one processor, wherein the computer program, in response to being executed by the at least one processor, causes the at least one processor to perform the method for reporting the hot-swap error according to claim 1 .

20 . A non-transitory computer readable storage medium, having a computer program stored therein, wherein the computer program, in response to being executed by a processor, causes the processor to perform the method for reporting the hot-swap error according to claim 1 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2025
From: ZHAO, TIANYU; SUN, XIUQIANG; HAN, GUOZHI; LIU, PEIYU; CHEN, CHUANG
To: SUZHOU METABRAIN INTELLIGENT TECHNOLOGY CO., LTD.
Reel/Frame 071473/0326 →
Priority Claims (1)
CN 202311704052.2 · Dec 12, 2023 · national
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