IP Library › Granted Patent US 12,725,575
Granted Patent B2
US 12,725,575 · App. 19/197,640 · Granted Sep 1, 2026

Pixel circuit, display panel, driving method and display device

Inventors: Dachao Li (Beijing, CN); Zhijian Zhu (Beijing, CN); Shengji Yang (Beijing, CN); Xiaochuan Chen (Beijing, CN); Junyan Yang (Beijing, CN); Pengcheng Lu (Beijing, CN); Longfei Fan (Beijing, CN)
Assignees: YUNNAN INVENSIGHT OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
G09G3/3233G09G2300/0852G09G2310/08G09G2320/0233
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Quick Facts
Patent No.
US 12,725,575
App. No.
19/197,640
Granted
Sep 1, 2026
Kind
B2
Abstract

A pixel circuit includes a light emitting element, a driving circuit, a first energy storage circuit, a second energy storage circuit, and a writing-in control circuit; a first terminal of the first energy storage circuit is electrically connected to a control terminal of the driving circuit and a first terminal of the writing-in control circuit respectively, and a second terminal of the first energy storage circuit is electrically connected to a first terminal of driving circuit, a first terminal of the second energy storage circuit is electrically connected to a second terminal of the writing-in control circuit, and a second terminal of the second energy storage circuit is electrically connected to the writing-in terminal.

Claims (65)

1 . A pixel circuit, comprising a light emitting element, a driving circuit, a first energy storage circuit, a second energy storage circuit, and a writing-in control circuit; wherein

a first terminal of the first energy storage circuit is electrically connected to a control terminal of the driving circuit and a first terminal of the writing-in control circuit respectively, and a second terminal of the first energy storage circuit is electrically connected to a first terminal of driving circuit, a first terminal of the second energy storage circuit is electrically connected to a second terminal of the writing-in control circuit, and a second terminal of the second energy storage circuit is electrically connected to a writing-in terminal; the first energy storage circuit and the second energy storage circuit are used to store electrical energy;

a control terminal of the writing-in control circuit is electrically connected to a first writing-in control terminal, and the writing-in control circuit is configured to control to connect or disconnect the first terminal of the first energy storage circuit and the first terminal of the second energy storage circuit under the control of a first writing-in control signal provided by the first writing-in control terminal;

a second terminal of the driving circuit is electrically connected to the light emitting element, and the driving circuit is configured to generate a driving current for driving the light emitting element under the control of a potential of the control terminal of the driving circuit;

wherein the driving circuit includes no additional transistor configured to electrically connect the control terminal and the second terminal of the driving circuit.

2 . The pixel circuit according to claim 1 , further comprising a first control circuit; wherein

the first control circuit is electrically connected to a first control terminal, the first terminal of the second energy storage circuit, and the second terminal of the second energy storage circuit, is configured to control to connect or disconnect the first terminal of the second energy storage circuit and the second terminal of the second energy storage circuit under the control of a first control signal provided by the first control terminal.

3 . The pixel circuit according to claim 1 , further comprising a second control circuit;

the second control circuit is electrically connected to a second control terminal, a power supply voltage terminal and the first terminal of the driving circuit, and is configured to control to connect or disconnect the power supply voltage terminal and the first terminal of the driving circuit under the control of a second control signal provided by the second control terminal.

4 . The pixel circuit according to claim 3 , wherein the second terminal of the driving circuit is electrically connected to a first electrode of the light emitting element, and a second electrode of the light emitting element is electrically connected to a first voltage terminal;

the power supply voltage terminal is used to provide a power supply voltage, and the first voltage terminal is used to provide a first voltage signal;

an absolute value of a voltage value of the power supply voltage is smaller than an absolute value of a voltage value of the first voltage signal.

5 . The pixel circuit according to claim 1 , further comprising a third control circuit; wherein the second terminal of the driving circuit is electrically connected to the first electrode of the light emitting element, and the second electrode of the light emitting element is electrically connected to a first voltage terminal;

the third control circuit is electrically connected to a third control terminal, a third voltage terminal and the first electrode of the light emitting element, and is configured to control to write a third voltage signal provided by the third voltage terminal into the first electrode of the light emitting element under the control of a third control signal provided by the third control terminal.

6 . The pixel circuit according to claim 1 , further comprising a reference voltage writing-in circuit; wherein

the reference voltage writing-in circuit is electrically connected to a second writing-in control terminal, a reference voltage terminal and a writing-in node respectively, and is configured to write a reference voltage provided by the reference voltage terminal into the writing-in node under the control of a second writing-in control signal provided by the second writing-in control terminal;

the writing-in node is electrically connected to the control terminal of the driving circuit, or the writing-in node is electrically connected to the first terminal of the second energy storage circuit.

7 . The pixel circuit according to claim 1 , further comprising a resistor circuit; wherein

a first terminal of the resistor circuit is electrically connected to the second terminal of the driving circuit, and a second terminal of the resistor circuit is electrically connected to the first electrode of the light emitting element;

the second electrode of the light emitting element is electrically connected to a first voltage terminal.

8 . The pixel circuit according to claim 1 , wherein the first energy storage circuit includes a first capacitor, and the second energy storage circuit includes a second capacitor;

a first terminal of the first capacitor is electrically connected to the control terminal of the driving circuit and the first terminal of the writing-in control circuit, and a second terminal of the first capacitor is connected to the first terminal of the driving circuit; a first terminal of the second capacitor is electrically connected to the second terminal of the writing-in control circuit, and a second terminal of the second capacitor is electrically connected to the writing-in terminal;

a capacitance value of the second capacitor is smaller than a capacitance value of the first capacitor.

9 . The pixel circuit according to claim 1 , wherein the writing-in control circuit comprises a first transistor;

a control electrode of the first transistor is electrically connected to the first writing-in control terminal, a first electrode of the first transistor is electrically connected to the control terminal of the driving circuit, and a second electrode of the first transistor is electrically connected to the first terminal of the second energy storage circuit; a back gate electrode of the first transistor is electrically connected to the second voltage terminal.

10 . The pixel circuit according to claim 2 , wherein the first control circuit comprises a second transistor;

a control electrode of the second transistor is electrically connected to the first control terminal, a first electrode of the second transistor is electrically connected to the first terminal of the second energy storage circuit, and a second electrode of the second transistor is electrically connected to the second terminal of the second energy storage circuit; a back gate electrode of the second transistor is electrically connected to the second voltage terminal.

11 . The pixel circuit according to claim 6 , wherein the reference voltage writing-in circuit comprises a third transistor;

a control electrode of the third transistor is electrically connected to the second writing-in control terminal, a first electrode of the third transistor is electrically connected to the reference voltage terminal, and a second electrode of the third transistor is electrically connected to the writing-in node; a back gate electrode of the third transistor is electrically connected to the second voltage terminal.

12 . The pixel circuit according to claim 3 , wherein the second control circuit comprises a fourth transistor; the driving circuit comprises a driving transistor;

a control electrode of the fourth transistor is electrically connected to the second control terminal, a first electrode of the fourth transistor is electrically connected to the power supply voltage terminal, and a second electrode of the fourth transistor is electrically connected to the first terminal of the driving circuit; a back gate electrode of the fourth transistor is electrically connected to the second voltage terminal;

a control electrode of the driving transistor is the control terminal of the driving circuit, a first electrode of the driving transistor is the first terminal of the driving circuit, and a second electrode of the driving transistor is electrically connected to the second terminal of the driving circuit; a back gate electrode of the driving transistor is electrically connected to the second voltage terminal.

13 . The pixel circuit according to claim 5 , wherein the third control circuit comprises a fifth transistor;

a control electrode of the fifth transistor is electrically connected to the third control terminal, a first electrode of the fifth transistor is electrically connected to the third voltage terminal, and a second electrode of the fifth transistor is electrically connected to the first electrode of the light emitting element; a back gate electrode of the fifth transistor is electrically connected to a fourth voltage terminal;

wherein the fifth transistor is an n-type transistor; the fourth voltage terminal is the third voltage terminal;

a deep n hydrazine is arranged between the back gate electrode of the fifth transistor and a P-type base substrate to isolate the back gate electrode of the fifth transistor from the P-type base substrate; the base gate electrode of the fifth transistor and the first electrodes of the fifth transistors are all electrically connected to the third voltage terminal;

the pixel circuit further includes an n hydrazine and a p hydrazine;

a doping concentration of the n hydrazine is greater than a doping concentration of the deep n hydrazine;

a ratio of a thickness of the n hydrazine to a thickness of the deep n hydrazine is greater than or equal to 0.4 and less than or equal to 0.6;

a ratio of a thickness of the p hydrazine to the thickness of the deep n hydrazine is greater than or equal to 0.4 and less than or equal to 0.6.

14 . A pixel circuit, comprising a light emitting element, a driving circuit, a first energy storage circuit, a second energy storage circuit, and a first control circuit;

a first terminal of the first energy storage circuit is electrically connected to a control terminal of the driving circuit, and a second terminal of the first energy storage circuit is electrically connected to a first terminal of the driving circuit; a first terminal of the second energy storage circuit is electrically connected to the control terminal of the driving circuit, and a second terminal of the second energy storage circuit is electrically connected to a writing-in terminal; the first energy storage circuit and the second energy storage circuit are used for storing electrical energy;

the first control circuit and the second energy storage circuit are connected in parallel, and the first control circuit is configured to control to connect or disconnect the first terminal of the second energy storage circuit and the second terminal of the second energy storage circuit under the control of a first control signal provided by a first control terminal;

a second terminal of the driving circuit is electrically connected to a light emitting element, and the driving circuit is configured to generate a driving current for driving the light emitting element under the control of a potential of the control terminal of the driving circuit;

wherein a control terminal of the first control circuit is electrically connected to the first control terminal, and a first terminal of the first control circuit is connected to the first terminal of the second energy storage circuit, a second terminal of the first control circuit is electrically connected to the second terminal of the second energy storage circuit.

15 . A display panel comprising a plurality of rows and a plurality of columns of pixel circuits, wherein the pixel circuit comprises a light emitting element, a driving circuit, a first energy storage circuit, a second energy storage circuit, and a writing-in control circuit; wherein

a first terminal of the first energy storage circuit is electrically connected to a control terminal of the driving circuit and a first terminal of the writing-in control circuit respectively, and a second terminal of the first energy storage circuit is electrically connected to a first terminal of driving circuit, a first terminal of the second energy storage circuit is electrically connected to a second terminal of the writing-in control circuit, and a second terminal of the second energy storage circuit is electrically connected to a writing-in terminal; the first energy storage circuit and the second energy storage circuit are used to store electrical energy;

a control terminal of the writing-in control circuit is electrically connected to a first writing-in control terminal, and the writing-in control circuit is configured to control to connect or disconnect the first terminal of the first energy storage circuit and the first terminal of the second energy storage circuit under the control of a first writing-in control signal provided by the first writing-in control terminal;

a second terminal of the driving circuit is electrically connected to the light emitting element, and the driving circuit is configured to generate a driving current for driving the light emitting element under the control of a potential of the control terminal of the driving circuit;

wherein the driving circuit includes no additional transistor configured to electrically connect the control terminal and the second terminal of the driving circuit.

16 . The display panel according to claim 15 , further comprising a plurality of columns of data lines; wherein

writing-in terminals of pixel circuits in a same column are electrically connected to data lines in a same column, and the second energy storage circuit includes a second capacitor;

the second capacitor is a parasitic capacitor between the data line and a signal line arranged on a same layer as the second capacitor.

17 . The display panel according to claim 15 , wherein the display panel includes a valid display area and a peripheral area, and the peripheral area surrounds the valid display area; the pixel circuit includes a first control circuit;

the first control circuit and the second energy storage circuit are arranged in the peripheral area, and components included in the pixel circuit other than the first control circuit and the second energy storage circuit are arranged in the valid display area.

18 . A driving method applied to the pixel circuit according to claim 1 , comprising:

controlling, by the writing-in control circuit, to connect or disconnect the first terminal of the first energy storage circuit and the first terminal of the second energy storage circuit under the control of the first writing-in control signal;

generating, by the driving circuit, a driving current for driving the light emitting element under the control of the potential of the control terminal of the driving circuit.

19 . A driving method applied to the pixel circuit according to claim 14 , the driving method comprising:

controlling, by the first control circuit, to connect or disconnect the first terminal of the second energy storage circuit and the second terminal of the second energy storage circuit under the control of the first control signal;

generating, by the driving circuit, a driving current for driving the light emitting element under the control of the potential of the control terminal of the driving circuit;

wherein a display period of the pixel circuit comprises an initialization phase, a self-discharge phase, a data preparation phase, a potential control phase, a data writing-in phase, and a light emitting phase set successively; the driving method comprises:

in the initialization phase, the self-discharging phase, the data preparation phase and the light emitting phase, controlling, by the first control circuit, to connect the first terminal of the second energy storage circuit and the second terminal of the second energy storage circuit under the control of the first control signa; and

in the potential control phase and the data writing-in phase, controlling, by the first control circuit, to disconnect the first terminal of the second energy storage circuit and the second terminal of the second energy storage circuit under the control of the first control signal.

20 . A display device comprising the display panel according to claim 15 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2025
From: LI, DACHAO; ZHU, ZHIJIAN; YANG, SHENGJI; CHEN, XIAOCHUAN; YANG, JUNYAN; LU, PENGCHENG; FAN, LONGFEI
To: BOE TECHNOLOGY GROUP CO., LTD.; YUNNAN INVENSIGHT OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 071167/0803 →
Continuity (2)
Continuation 18262699 · May 31, 2022
Related Publication 20250265999A1 · Aug 21, 2025
References Cited (8)
US 20210201827A1 · Jang et al. · 2021 [cited by applicant]
CN 103065582A · 2013 [cited by examiner]
CN 109637455A · 2019 [cited by applicant]
CN 111223450A · 2020 [cited by applicant]
CN 114026629A · 2022 [cited by applicant]
KR 20080067489A · 2008 [cited by applicant]
WO 2022041341A1 · 2022 [cited by applicant]
First Chinese Office Action for Chinese Patent Application No. 202280001921.2 mailed Jul. 11, 2025. 17 pages. [cited by applicant]