VOLTAGE GENERATION AND REGULATION ACROSS MULTIPLE DIES
Methods, systems, and devices for die voltage regulation are described. A device may include a first die and second die. A component that generates voltage on the first die may be connected to a capacitor on the second die through a conductive line. The conductive line may allow the capacitor on the second die to regulate voltage generated by the component on the first die.
1 . An apparatus, comprising:
a layer;
a first die positioned above the layer in a first direction, the first die comprising a component configured to generate a voltage for use by the first die;
a second die positioned above the layer in the first direction, the second die comprising a capacitor configured to regulate the voltage generated by the first die; and
a conductive line that is configured to couple the capacitor of the second die with the component of the first die, wherein a first portion of the conductive line extends in a second direction within the layer, the second direction different from the first direction.
2 . The apparatus of claim 1 , wherein the second die comprises a volatile memory comprising one or more memory cells, wherein each of the one or more memory cells comprise a respective second capacitor that is isolated from the capacitor.
3 . The apparatus of claim 2 , further comprising:
access circuitry coupled with the volatile memory and configured to access the one or more memory cells.
4 . The apparatus of claim 1 , wherein the second die comprises:
a second capacitor in parallel with the capacitor and coupled with the component of the first die via the first conductive line; and
a switching component coupled with, and disposed between, the second capacitor and the capacitor.
5 . The apparatus of claim 4 , wherein the second die further comprises a second switching component coupled with, and disposed between, the second capacitor and the capacitor.
6 . The apparatus of claim 5 , wherein:
the switching component is configured to couple a first terminal of the capacitor with a first terminal of the second capacitor; and
the second switching component is configured to couple a second terminal of the capacitor with a second terminal of the second capacitor.
7 . The apparatus of claim 4 , wherein the switching component is configured to adjust an effective capacitance of the capacitor and the second capacitor.
8 . The apparatus of claim 1 , further comprising:
a material disposed over the layer and at least partially surrounding the first die and the second die, wherein a second portion of the conductive line is at least partially disposed within the material.
9 . The apparatus of claim 1 , further comprising:
a conductive pad coupled with the layer and configured to convey electrical signals to and from the first die; and
a second conductive line coupled between the first die and the conductive pad.
10 . The apparatus of claim 9 , further comprising:
a second conductive pad coupled with the layer and configured to convey electrical signals to and from the second die; and
a third conductive line coupled between the second die and the second conductive pad.
11 . An apparatus, comprising:
a material disposed over a layer;
a first die at least partially disposed within the material and positioned above the layer in a first direction, the first die comprising a component configured to generate a voltage for use by the first die;
a second die at least partially disposed within the material and positioned above the layer in the first direction, the second die comprising a capacitor configured to regulate the voltage generated by the first die; and
a first conductive line that is configured to couple the capacitor of the second die with the component of the first die, wherein a first portion of the first conductive line extends in the first direction within the material and a second portion of the first conductive line extends in a second direction within the layer, the second direction different from the first direction.
12 . The apparatus of claim 11 , wherein the second die comprises a volatile memory comprising one or more memory cells, wherein each of the one or more memory cells comprise a respective second capacitor that is isolated from the capacitor.
13 . The apparatus of claim 12 , further comprising:
access circuitry coupled with the volatile memory and configured to access the one or more memory cells.
14 . The apparatus of claim 11 , wherein the second die comprises:
a second capacitor in parallel with the capacitor and coupled with the component of the first die via the first conductive line; and
a switching component coupled with, and disposed between, the second capacitor and the capacitor.
15 . The apparatus of claim 14 , wherein the second die further comprises a second switching component coupled with, and disposed between, the second capacitor and the capacitor.
16 . The apparatus of claim 15 , wherein:
the switching component is configured to couple a first terminal of the capacitor with a first terminal of the second capacitor; and
the second switching component is configured to couple a second terminal of the capacitor with a second terminal of the second capacitor.
17 . The apparatus of claim 14 , wherein the switching component is configured to adjust an effective capacitance of the capacitor and the second capacitor.
18 . A method, comprising:
generating a voltage at a first component disposed on a first die, the first die positioned over a layer in a first direction;
regulating the voltage using a capacitor disposed on a second die, the second die positioned over the layer in the first direction, wherein the capacitor is coupled with the first component via a conductive line, and wherein a first portion of the conductive line extends in a second direction within the layer, the second direction different from the first direction; and
applying the voltage regulated by the capacitor to one or more second components disposed on the first die.
19 . The method of claim 18 , wherein the second die comprises a volatile memory comprising one or more memory cells, wherein each of the one or more memory cells comprise a respective second capacitor that is isolated from the capacitor.
20 . The method of claim 18 , wherein regulating the voltage comprises:
regulating the voltage using the capacitor and a second capacitor disposed on the second die.