COMMUNICATION METHODS, SYSTEMS AND DEVICES
The ability to efficiently and reliably transmit, route and receive data across telecommunication networks is essential for existing and evolving applications where connectivity to these networks is a ubiquitous aspect of society today. However, limitations in existing telecommunication networks impact this through performance, cost, and speed. To address this the inventor has established improvements with respect to routing (switching), processing, and monitoring. For routing low latency switch architectures for improving packet-based data switching are described. For processing digital optical logic devices and digital optical processing structures for enhanced functionality and processing within optical telecommunication networks are described. For monitoring improved optical connectors which provide embedded monitoring and analytical functionality for improved management of optical telecommunication networks are described.
1 . A method of implementing a switch architecture comprising the steps of:
a) establishing a dimension of the switch architecture, where the dimension is a number of input ports;
b) establishing the dimension of switch architecture with a number of switches of a smaller dimension established in a number of layers where the switches within each intermediate layer are coupled to the switches within a preceding layer by a fully connected mesh network and to other switches within a subsequent layer by another fully connected mesh network;
c) iteratively repeating the step (b) for each switch of the smaller dimension until a final iteration wherein the smaller dimension is M;
d) providing on each input of the switch architecture a buffer to accept packets of data to be routed by the switch architecture; and
e) populating each buffer with null packets at a predetermined ratio wherein the switch architecture ignores null packets; wherein
each switch pseudo-randomly distributes packets of data to the number of switches of small dimension such that each switch of the number of switches of smaller dimension is loaded at a predetermined ratio;
M is an integer and is equal to M=2 X where X≥2.
2 . The method according to claim 1 , wherein
each switch of the smaller dimension of the number of switches of the smaller dimension comprises a plurality R planes of T×T sub-switches and a plurality R- 1 planes of other interconnections between adjacent planes of T×T sub-switches of the plurality of R planes of T×T sub-switches;
R and T are positive integers.
3 . The method according to claim 1 , wherein
the dimension of the switch architecture is N;
the number of switches of a smaller dimension established in a number of layers are disposed within a plurality L planes such that there are L−1 fully connected mesh networks;
N is a positive integer equal to N=2 X where X≥2; and
the smaller dimension is M where M is a positive integer where M=2 Y and X>Y>1.
4 . The method according to claim 1 , wherein
the switch architecture routes 100% of traffic received.
5 . The method according to claim 1 , wherein
the switch architecture is strictly non-blocking and a number of physical resources required to implement the switch architecture scales linearly with the dimension of the switch architecture.
6 . The method according to claim 1 , wherein
the switch architecture is strictly non-blocking;
a number of physical resources required to implement the switch architecture scales linearly with the dimension of the switch architecture; and
the predetermined ratio is established in dependence upon a point of inflection within a plot of a size of a buffer queue of another buffer associated with a switch of the number of switches versus a percentage of null packets within traffic provided to the switch of the number of switches.
7 . The method according to claim 1 , wherein
the number of switches of smaller dimension for each switch in the resulting hierarchy of levels of switching is established in dependence upon a ratio of packets of data to null packets that a switch of smaller dimension would successfully route with 100% efficiency.
8 . The method according to claim 1 , further comprising
providing as part of the switch architecture upon each input port of the number of input ports a multiplexer; and
providing a controller coupled to the switch architecture for controlling the switch architecture; wherein
the controller controls each multiplexer such that a data stream coupled to that input port of the number of input ports is parsed into a number W streams wherein each stream of the number W streams is coupled to a different switch of the smaller dimension of the number of switches of the smaller dimension within a first layer of the number of layers; and
another data stream coupled from each output port of the switch architecture is merged from the number W streams wherein each stream of the number W streams merged is coupled from a different switch of the smaller dimension of the number of switches of the smaller dimension within the last layer of the number of layers.
9 . The method according to claim 8 , wherein
randomly selected portions of the data stream at each input port are coupled to each stream of number W streams;
each stream of the number of W streams has null packets with no address assignment for those portions of the stream of the W streams not comprising a randomly selected portion of the data stream; and
W is established in dependence upon N.
10 . The method according to claim 8 , wherein
randomly selected portions of the data stream are coupled to each stream of number W streams;
each stream of the number of W streams has null packets with no address assignment for those portions of the stream of the W streams not comprising a randomly selected portion of the data stream;
W is established in dependence upon N;
the null packets are introduced at the multiplexer which is driven by a pseudo-random generator.
11 . The method according to claim 8 , wherein
randomly selected portions of the data stream are coupled to each stream of number W streams;
each stream of the number of W streams has null packets with no address assignment for those portions of the stream of the W streams not comprising a randomly selected portion of the data stream;
W is established in dependence upon N; and
the null packets are introduced at the multiplexer which is driven by a pseudo-random generator such that the null packets are established at a predetermined ratio.
12 . The method according to claim 8 , wherein
randomly selected portions of the data stream are coupled to each stream of number W streams;
each stream of the number of W streams has null packets with no address assignment for those portions of the stream of the W streams not comprising a randomly selected portion of the data stream;
W is established in dependence upon N;
the null packets are introduced at the multiplexer which is driven by a pseudo-random generator such that the null packets are established at a predetermined ratio; and
the switch architecture ignores null packets.
13 . The method according to claim 8 , wherein
randomly selected portions of the data stream are coupled to each stream of number W streams;
each stream of the number of W streams has null packets with no address assignment for those portions of the stream of the W streams not comprising a randomly selected portion of the data stream;
W is established in dependence upon N;
the null packets are introduced at the multiplexer which is driven by a pseudo-random generator such that the null packets are established at a predetermined ratio;
the switch architecture ignores null packets; and
the percentage of successfully routed packets through the switch architecture increases with the percentage of null packets.
14 . The method according to claim 8 , wherein
randomly selected portions of the data stream are coupled to each stream of number W streams;
each stream of the number of W streams has null packets with no address assignment for those portions of the stream of the W streams not comprising a randomly selected portion of the data stream;
W is established in dependence upon N;
the null packets are introduced at the multiplexer which is driven by a pseudo-random generator such that the null packets are established at a predetermined ratio;
the switch architecture ignores null packets;
the percentage of successfully routed packets through the switch architecture increases with the percentage of null packets; and
the percentage of successfully routed packets through the switch architecture decreases with increasing dimension of the switch architecture at a defined percentage of null packets.
15 . The method according to claim 8 , further comprising
defining a size of the buffers; and
establishing a percentage of null packets in dependence upon the defined size of the buffer and the dimension M defined in the final iteration of step (c); wherein
each buffer is disposed between a multiplexer and a switch of the number of switches of the smaller dimension established within a layer of the number of layers closest to the input ports of the switch architecture.
16 . The method according to claim 1 , further comprising
providing as part of the switch architecture upon each input port of the number of input ports a multiplexer having W output ports; and
providing W−1 other switch architectures such that there are W switch architectures forming W parallel layers of switching; wherein
W is an integer and W≥1;
each buffer is a first-in-first-out (FIFO) queue;
each multiplexer divides a data stream coupled to its associated input port of the number of input ports into W streams wherein each stream of the W streams is coupled to a different switch architecture of the W switch architectures;
each multiplexer is coupled to a pseudo-random control circuit which randomly selects the portions of the data stream that are coupled to each stream of W streams;
each stream of the number of W streams incorporates null packets with no address assignment for those portions of the stream of the W streams not comprising a randomly selected portion of the data stream.
17 . The method according to claim 16 , further comprising
defining a size of the buffers; and
establishing a percentage of null packets in dependence upon the defined size of the buffer and the dimension M defined in the final iteration of step (c); wherein
each buffer is disposed between a multiplexer and a switch of the number of switches of the smaller dimension established within a layer of the number of layers closest to the input ports of the switch architecture.