EXCEPTION HANDLER BASED ERROR CORRECTION FOR PROCESSORS

1 . An apparatus comprising:

a storage having a plurality of storage locations, including a storage location to store data;

an execution unit to execute an instruction to access the data;

an error correction code (ECC) decoder, when the data is erroneous data having one or more correctable errors, to:

detect the one or more correctable errors in the erroneous data; and

correct the one or more correctable errors;

circuitry to store information to indicate the storage location in an error log; and

circuitry to transition to an exception handler corresponding to an exception due to the one or more correctable errors.

2 . The apparatus of claim 1 , wherein the storage is a set of registers, wherein the storage location is a register of the set of registers, and wherein the information to indicate the storage location is a number of the register.

3 . The apparatus of claim 1 , further comprising:

a decode unit to decode a second instruction of an exception handler, the second instruction to indicate a register of a set of registers as the storage location; and

an execution unit to execute the second instruction to:

read the data, which has been corrected of the one or more correctable errors by the ECC decoder, from the register; and

store the data, which has been corrected of the one or more correctable errors by the ECC decoder, to the register.

4 . The apparatus of claim 1 , wherein the storage is selected from a group consisting of a cache, a shared memory, a tightly coupled memory, and external system memory, and wherein the information to indicate the storage location includes memory address information to indicate a memory address corresponding to the storage location.

5 . The apparatus of claim 4 , wherein the storage is the external system memory.

6 . The apparatus of claim 1 , further comprising:

a decode unit to decode a second instruction and a third instruction, the second and third instructions being of an exception handler, the second and third instructions to each indicate memory address information corresponding to the storage location; and

one or more execution units to:

execute the second instruction to read the data, which has been corrected of the one or more correctable errors by the ECC decoder, from the storage location; and

execute the third instruction to store the data, which has been corrected of the one or more correctable errors by the ECC decoder, to the storage location.

7 . The apparatus of claim 1 , wherein the circuitry is further to store a plurality of following information in the error log:

information to indicate the storage;

information to indicate that the one or more correctable errors are correctable; and

information to indicate that the one or more correctable errors are one or more ECC errors.

8 . The apparatus of claim 1 , further comprising one or more registers to store the error log.

9 . The apparatus of claim 1 , further comprising one or more registers having a plurality of fields, each of the plurality of fields corresponding to a different one of a plurality of different types of the storage, each of the plurality of fields to store either a first value to enable correction of the one or more correctable errors by an exception handler or a second value to disable the correction of the one or more correctable errors by the exception handler.

10 . A non-transitory machine-readable storage medium storing instructions that if executed by a machine are to cause the machine to perform operations, including to:

read information indicative of a storage location of a storage from an error log, the storage location to store erroneous data having one or more correctable errors;

read data, which has been corrected of the one or more correctable errors by an error correction code (ECC) decoder, from the storage location;

store the data, which has been corrected of the one or more correctable errors, to the storage location, overwriting the erroneous data; and

return to a program that previously accessed the erroneous data and took an exception.

11 . The non-transitory machine-readable storage medium of claim 10 , wherein the storage is a set of registers, wherein the storage location is a register of the set of registers, and wherein the information to indicate the storage location is a number of the register.

12 . The non-transitory machine-readable storage medium of claim 10 , wherein the storage location is a register of a set of registers, wherein the instructions include an instruction that is to indicate the register, and wherein the instruction if executed by the machine is to cause the machine to:

read the data, which has been corrected of the one or more correctable errors by the ECC decoder, from the register; and

store the data, which has been corrected of the one or more correctable errors by the ECC decoder, to the register.

13 . The non-transitory machine-readable storage medium of claim 10 , wherein the storage is selected from a group consisting of a cache, a shared memory, a tightly coupled memory, and external system memory, and wherein the information to indicate the storage location includes memory address information to indicate a memory address corresponding to the storage location.

14 . The non-transitory machine-readable storage medium of claim 10 , wherein the storage is selected from a group consisting of a cache, a shared memory, a tightly coupled memory, and external system memory, wherein the instructions include a first instruction and a second instruction that are each to indicate memory address information corresponding to the storage location, wherein the first instruction if executed by the machine is to cause the machine to read the data, which has been corrected of the one or more correctable errors by the ECC decoder, from the storage location, and wherein the second instruction if executed by the machine is to cause the machine to store the data, which has been corrected of the one or more correctable errors by the ECC decoder, to the storage location.

15 . The non-transitory machine-readable storage medium of claim 10 , wherein the storage is an external system memory.

16 . The non-transitory machine-readable storage medium of claim 10 , wherein the instructions further comprise instructions that if executed by the machine are to cause the machine to read a plurality of following information from the error log:

information to indicate the storage;

information to indicate that the one or more correctable errors are correctable; and

information to indicate that the one or more correctable errors are one or more ECC errors.

17 . A method comprising:

storing data in a storage location;

accessing the data;

detecting that the data has one or more correctable errors using error correction code (ECC) bits;

correcting the one or more correctable errors using the ECC bits;

storing information to indicate the storage location in an error log; and

transitioning to an exception handler corresponding to an exception due to the one or more correctable errors.

18 . The method of claim 17 , wherein the storage location is a register of a set of registers, and wherein the information to indicate the storage location is a number of the register.

19 . The method of claim 17 , wherein the storage location is in a storage that is selected from a group consisting of a cache, a shared memory, a tightly coupled memory, and external system memory, and wherein the information to indicate the storage location includes memory address information to indicate a memory address corresponding to the storage location.

20 . The method of claim 17 , further comprising:

decoding an instruction of an exception handler, the instruction indicating the storage location; and

executing the instruction, including:

reading the data, which has been corrected of the one or more correctable errors by using the ECC bits, from the storage location; and

storing the data, which has been corrected of the one or more correctable errors by using the ECC bits, to the storage location.