SEMICONDUCTOR PACKAGES USING PACKAGE IN PACKAGE SYSTEMS AND RELATED METHODS
Implementations of a semiconductor package may include two or more die, each of the two more die coupled to a metal layer at a drain of each of the two more die, the two or more die and each metal layer arranged in two parallel planes; a first interconnect layer coupled at a source of each of the two more die; a second interconnect layer coupled to a gate of each of the two or more die and to a gate package contact through one or more vias; and an encapsulant that encapsulates the two or more die and at least a portion of the first interconnect layer, each metal layer, and the second interconnect layer.
1 . A semiconductor package comprising:
a metal layer;
two or more die, each of the two more die coupled to the metal layer at a drain of each of the two more die;
a first interconnect layer coupled at a source of each of the two more die;
a second interconnect layer coupled to a gate of each of the two or more die; and
a via coupled between the second interconnect layer and a gate package contact;
wherein each drain of the two or more die faces towards the metal layer.
2 . The package of claim 1 , further comprising an encapsulant that encapsulates a portion of the gate package contact.
3 . The package of claim 1 , wherein the metal layer comprises a groove in an outer sidewall.
4 . The package of claim 1 , wherein the first interconnect layer comprises three or more layers.
5 . The package of claim 1 , wherein a NiAu coating is directly coupled to the metal layer, the gate package contact, and the second interconnect layer.
6 . The package of claim 1 , wherein the two or more die are power semiconductor die.
7 . The package of claim 1 , wherein the two or more die comprise silicon carbide.
8 . The package of claim 1 , wherein the metal layer and the gate package contact are comprised in a leadframe.
9 . A semiconductor package comprising:
a metal layer;
two or more die, each of the two more die coupled to the metal layer at a drain of each of the two more die;
a first interconnect layer coupled at a source of each of the two more die; and
a clip coupled to a gate of each of the two or more die;
wherein each drain of the two or more die faces towards the metal layer.
10 . The package of claim 9 , wherein the first interconnect layer comprises two or more copper slugs.
11 . The package of claim 9 , wherein an outer perimeter of the metal layer comprises a groove.
12 . The package of claim 9 , wherein a metal coating is directly coupled to the metal layer.
13 . The package of claim 9 , further comprising a redistribution layer directly coupled to the first interconnect layer.
14 . The package of claim 13 , further comprising a metal coating directly coupled to the redistribution layer and the metal layer.
15 . The package of claim 9 , wherein the metal layer is comprised in a leadframe.
16 . A method of forming a semiconductor package, the method comprising:
providing two or more die;
coupling each of the two or more die to a metal layer at a drain of each of the two or more die;
forming a first interconnect layer coupled to a source of each of the two or more die; and
forming a second interconnect layer coupled to a gate of each of the two or more die;
wherein the drain of each of the two or more die face the metal layer.
17 . The method of claim 16 , further comprising forming a plurality of vias directly coupled to a gate package contact.
18 . The method of claim 16 , wherein the second interconnect layer comprises a clip.
19 . The method of claim 16 , wherein coupling each of the two or more die to the metal layer further comprises using a silver sintering film and pressure sintering.
20 . The method of claim 16 , further comprising coating the metal layer with a metal coating.