SEMICONDUCTOR DEVICES AND RELATED METHODS
In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
1 . A semiconductor device, comprising:
a substrate comprising a dielectric structure and a conductive structure;
a first electronic device, wherein the first electronic device comprises a first device terminal;
a second electronic device over the first electronic device and comprising a second device terminal;
a first vertical interconnect coupled with the first device terminal of the first electronic device;
a second vertical interconnect coupled with the second device terminal of the second electronic device; and
an encapsulant over the substrate, over a top side of the first electronic device, and over a top side of the second electronic device;
wherein:
the first device terminal of the first electronic device is coupled with the conductive structure of the substrate and the first vertical interconnect; and
the second device terminal of the second electronic device is coupled with the conductive structure of the substrate and the second vertical interconnect.
2 . The semiconductor device of claim 1 , wherein:
the first vertical interconnect and the second vertical interconnect are perpendicular to a top side of the substrate.
3 . The semiconductor device of claim 1 , wherein:
a top side of the first electronic device is above a top side of the substrate; and
a top side of the second electronic device is above the top side of the substrate.
4 . The semiconductor device of claim 1 , wherein:
the first electronic device is coupled with the conductive structure of the substrate through the first vertical interconnect; and
the second electronic device is coupled with the conductive structure of the substrate through the second vertical interconnect.
5 . The semiconductor device of claim 1 , wherein:
the first electronic device is horizontally offset from the second electronic device by a first distance; and
the first vertical interconnect is horizontally offset from the second vertical interconnect by the first distance.
6 . The semiconductor device of claim 1 , wherein:
the first vertical interconnect comprises a vertical wire; and
the second vertical interconnect comprises a vertical wire.
7 . A semiconductor device, comprising:
a substrate comprising a dielectric structure, a conductive structure, a first side, and a second side opposite to the first side;
a device stack comprising a first electronic device, a second electronic device over the first electronic device, and a third electronic device over the second electronic device;
an encapsulant over the first side of the substrate and covering a lateral side of the first electronic device, a lateral side of the second electronic device, and a lateral side of the third electronic device; and
a vertical interconnect coupled to the first side of the substrate and coupled with the first electronic device, wherein the vertical interconnect is in the encapsulant;
wherein:
the second electronic device is laterally offset from the first electronic device; and
the third electronic device is laterally offset from the second electronic device.
8 . The semiconductor device of claim 7 , wherein:
the vertical interconnect is coupled with a substrate terminal on the first side of the substrate.
9 . The semiconductor device of claim 7 , wherein:
the first electronic device comprises a first device terminal; and
the vertical interconnect is coupled with the first device terminal.
10 . The semiconductor device of claim 9 , wherein:
the first device terminal is oriented toward the substrate.
11 . The semiconductor device of claim 7 , wherein:
the vertical interconnect is perpendicular with the first side of the substrate.
12 . The semiconductor device of claim 7 , wherein:
the vertical interconnect comprises a vertical wire.
13 . The semiconductor device of claim 12 , wherein:
the first electronic device is coupled with the conductive structure of the substrate through an internal interconnect in the encapsulant; and
the first electronic device is coupled with the vertical interconnect through the conductive structure of the substrate.
14 . The semiconductor device of claim 7 , wherein:
a top side of the vertical interconnect is exposed from a top side of the encapsulant.
15 . A semiconductor device, comprising:
a first substrate comprising a dielectric structure and a conductive structure, a top side, a first lateral side, and a second lateral side opposite to the first lateral side;
a device stack comprising a first electronic device and a second electronic device over the first electronic device;
a first encapsulant over the top side of the first substrate and covering a lateral side of the first electronic device and a lateral side of the second electronic device; and
a first internal interconnect in the first encapsulant and coupled between the first electronic device and the conductive structure of the first substrate;
wherein substrate comprises a substrate shelf at the top side of the first substrate that is exposed from the first encapsulant at the first lateral side of the first substrate, and the top side of the first substrate is covered by the first encapsulant at the second lateral side of the first substrate.
16 . The semiconductor device of claim 15 , wherein:
the first encapsulant comprises a sidewall that is recessed from the first lateral side of the first substrate; and
the sidewall is perpendicular to the top side of the first substrate.
17 . The semiconductor device of claim 15 , wherein:
the first encapsulant comprises a sidewall that is recessed from the first lateral side of the first substrate; and
the sidewall extends at a non-perpendicular from the top side of the first substrate.
18 . The semiconductor device of claim 15 , wherein:
the first substrate comprises an internal terminal at the substrate shelf of the first substrate; and
the internal terminal is exposed from the first encapsulant.
19 . The semiconductor device of claim 15 , wherein the first encapsulant comprises a sidewall that is coplanar with the second lateral side of the first substrate.
20 . The semiconductor device of claim 15 , comprising:
a second substrate comprising a top terminal on a top side of the second substrate;
a second encapsulant over the top side of the second substrate; and
a module interconnect in the second encapsulant;
wherein:
the first substrate, the device stack, the first encapsulant, and the first internal interconnect comprise a module over the top side of the second substrate;
the module is in the second encapsulant; and
the module interconnect is coupled between top terminal and the conductive structure of the first substrate at the substrate shelf of the first substrate.