IP Library › Granted Patent US 673,922
Granted Patent S1
US 673,922 · App. 29/393,921 · Granted Jan 8, 2013

Portion of a substrate for an electronic circuit

Assignee: Kabushiki Kaisha Toshiba
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 673,922
App. No.
29/393,921
Granted
Jan 8, 2013
Kind
S1
Claims (1)

The ornamental design for a portion of a substrate for an electronic circuit, as shown and described.

Assignments (3)
CHANGE OF NAME Recorded Feb 7, 2020
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 051842/0627 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2018
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 045175/0632 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2011
From: MORIAI, TAKAKATSU; OZAWA, ISAO; EGUCHI, TOYOKAZU
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 026427/0220 →
Priority Claims (1)
JP 2011-009238 · Apr 21, 2011 · national