IP Library › Granted Patent US 778,851
Granted Patent S1
US 778,851 · App. 29/564,507 · Granted Feb 14, 2017

Substrate for an electronic circuit

Inventors: Manabu Matsumoto (Yokohama, JP); Isao Ozawa (Chigasaki, JP)
Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 778,851
App. No.
29/564,507
Granted
Feb 14, 2017
Kind
S1
Claims (1)

The ornamental design for a substrate for an electronic circuit, as shown and described.

Assignments (3)
CHANGE OF NAME Recorded Feb 7, 2020
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 051842/0627 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2018
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 045175/0632 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2016
From: MATSUMOTO, MANABU; OZAWA, ISAO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 038587/0497 →
Priority Claims (4)
JP 2014-010418 · May 15, 2014 · national
JP 2014-010419 · May 15, 2014 · national
JP 2014-010420 · May 15, 2014 · national
JP 2014-010421 · May 15, 2014 · national
Continuity (1)
Division 29500896 · Aug 29, 2014