Patent Application
Provisional
App. No. 60/276,424
· Confirmation No. 7893
Technique for reducing the parasitic capacitance of ESD protected input/output nodes
Provisional Application Expired
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2005-08-02 | EBCC.AD |
Notice of Change of Address Place in File Wrapper Due to Electronic Business Center(EBC) Customer Number Update | 1 | View | |
| 2001-03-16 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-03-16 | SPEC |
Specification | 3 | View | |
| 2001-03-16 | DRW |
Drawings-only black and white line drawings | 3 | View |
Inventors
Cornelius C. Russ
Princeton, NJ
John Armer
Middlesex, NJ
Attorneys & Agents of Record
Prosecution
- Customer No.
- 55549
- Docket No.
- SAR 14181P
- Confirmation No.
- 7893
Child
Claims priority from a provisional application
→
App. 11/473,360
· US 7,548,401
Filed 2006-06-22
· Patent Expired Due to NonPayment of Maintenance Fees Under 37 CFR 1.362
Child
PCT
is a Continuation of
→
PCT/US2002/007895
Filed 2002-03-15
· PCT - IPER (International Preliminary Examination Report) 409-416 Mailed
Child
Claims priority from a provisional application
→
App. 10/899,383
· US 7,589,944
Filed 2004-07-26
· Patented Case
Child
Claims priority from a provisional application
→
App. 10/099,600
· US 6,768,616
Filed 2002-03-15
· Patented Case
No recorded assignments were found for this patent.
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Quick Facts
- App. No.
- 60/276,424
- Filed
- 2001-03-16
External Links