IP Library › Patent Application 60607646
Patent Application Provisional
App. No. 60/607,646 · Confirmation No. 6326

Method and system for ensuring the assertion order of signals in a chip independent of physical layout

Inventor: James D. Sweet
Provisional Application Expired
⬇ PDF
 Code Description Pages PDF
2004-09-07 TRNA Transmittal of New Application 2 View
2004-09-07 SPEC Specification 10 View
2004-09-07 CLM Claims 1 View
2004-09-07 ABST Abstract 1 View
2004-09-07 DRW Drawings-only black and white line drawings 2 View
2004-09-07 WFEE Fee Worksheet (SB06) 1 View
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
App. No.
60/607,646
Filed
2004-09-07