Patent Application
Provisional
App. No. 60/818,820
· Confirmation No. 5665
Techniques for optimizing the memory path in whole system simulations
Inventor:
Jeroen Dobbelaere
Provisional Application Expired
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2006-10-02 | PEFR |
Applicant Response to Pre-Exam Formalities Notice | 5 | View | |
| 2006-10-02 | WFEE |
Fee Worksheet (SB06) | 1 | View | |
| 2006-07-25 | PEFN |
Pre-Exam Formalities Notice | 2 | View | |
| 2006-07-05 | TRNA |
Transmittal of New Application | 3 | View | |
| 2006-07-05 | SPEC |
Specification | 8 | View | |
| 2006-07-05 | CLM |
Claims | 1 | View | |
| 2006-07-05 | ABST |
Abstract | 1 | View | |
| 2006-07-05 | WFEE |
Fee Worksheet (SB06) | 1 | View |
Inventors
Jeroen Dobbelaere
Heverlee, BELGIUM
Attorneys & Agents of Record
Prosecution
- Customer No.
- 45546
- Docket No.
- COWR-P024.PRO
- Confirmation No.
- 5665
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Quick Facts
- App. No.
- 60/818,820
- Filed
- 2006-07-05
External Links