Patent Application
Provisional
App. No. 63/223,704
· Confirmation No. 7739
Calibration Loop to Achieve Ultra-low (<5ps) Duty Cycle Distortion (DCD) for High Speed OOK Based Digital Isolators
Inventors:
RR Manikandan, Kumar Anurag Shrivastava, Robert Floyd Payne, Anant Shankar Kamath, Swaminathan Sankaran, Kishalay Datta, Siraj Akhtar, Mark Edward Wentroble, Suvadip Banerjee, Rakesh Hariharan, Gurumurti Kailaschandra Avhad
Applicant:
Texas Instruments Incorporated
Provisional Application Expired
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2021-08-04 | APP.FILE.REC |
Filing Receipt | 3 | View | |
| 2021-07-20 | PA.. |
Power of Attorney | 2 | View | |
| 2021-07-20 | SPEC |
Specification | 10 | View | |
| 2021-07-20 | WFEE |
Fee Worksheet (SB06) | 2 | View | |
| 2021-07-20 | N417 |
Electronic Filing System Acknowledgment Receipt | 3 | View | |
| 2021-07-20 | ADS |
Application Data Sheet | 11 | View |
Inventors
RR Manikandan
Bangalore, INDIA
Kumar Anurag Shrivastava
Chhattisgarh, INDIA
Robert Floyd Payne
McKinney, TX
Anant Shankar Kamath
Bangalore, INDIA
Swaminathan Sankaran
Allen, TX
Kishalay Datta
Kolkata, INDIA
Siraj Akhtar
Richardson, TX
Mark Edward Wentroble
Plano, TX
Suvadip Banerjee
Bangalore, INDIA
Rakesh Hariharan
Bangalore, INDIA
Gurumurti Kailaschandra Avhad
Bangalore, INDIA
Attorneys & Agents of Record
Prosecution
- Customer No.
- 23494
- Docket No.
- T100827US02
- Confirmation No.
- 7739
from
AKHTAR, SIRAJ,
DATTA, KISHALAY,
WENTROBLE, MARK EDWARD,
SANKARAN, SWAMINATHAN,
PAYNE, ROBERT FLOYD,
HARIHARAN, RAKESH,
BANERJEE, SUVADIP,
SHRIVASTAVA, KUMAR ANURAG,
KAMATH, ANANT SHANKAR,
MANIKANDAN, RR,
AVHAD, GURUMURTI KAILASCHANDRA
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2021-10-15
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Quick Facts
- App. No.
- 63/223,704
- Filed
- 2021-07-20
External Links