Method of driving gates of liquid crystal display
Disclosed is a method of driving a gate line in an LCD which enables to extend a line time by making different a falling time of scan signals while concurrently driving plural gate lines. In the method, scan signals which rise concurrently are applied to at least two gate lines while rendering said scan signals to fall at different timings such that said gate lines are concurrently driven and video signals are sampled by pixels corresponding to said gate lines at different falling times. The present invention makes it possible to extend a line time without lowering of the resolution or degradation of picture quality.
1. A method for driving gate lines of a liquid crystal display, comprising: applying scan signals which rise concurrently to at least two gate lines while rendering said scan signals to fall at different timings during N line drive times such that said gate lines are concurrently driven and video signals to be provided to each of the at least two gate lines are sampled by pixels corresponding gate lines at different falling times, wherein each scan signal rises concurrently and has a different falling time on each gate line during N line drive times when driving N gate lines concurrently, wherein N is an integer no less than 2,
the falling time of an Nth scan signal is the end of an Nth line drive time, and
the falling time of a kth scan signal is sooner than the falling time of a (k+1)th scan signal, wherein k is an integer no less than 1 and no more than (N−1),
such that video signals to be provided for each corresponding gate line are sampled by pixels of said corresponding gate line at different falling timings during said N line times, wherein said scan signals comprise a first scan signal which is applied to an even gate line and a second scan signal which is applied to an odd gate line, wherein the first scan signal falls faster than the second scan signal and then independently rises when the second scan signal falls, to render a falling condition of the odd gate line and the even gate line equal.