IP Library Granted Patent US 7,166,519
Granted Patent B2
US 7,166,519 · App. 10/866,618 · Granted Jan 23, 2007

Method for isolating semiconductor devices with use of shallow trench isolation method

Assignee: Hynix Semiconductor Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,166,519
App. No.
10/866,618
Granted
Jan 23, 2007
Kind
B2
Abstract

The present invention relates to a method for isolating semiconductor devices. The method includes the steps of: forming a patterned pad nitride layer pattern to open at least one isolation region on the substrate; forming a first trench and a second trench by etching the exposed substrate; depositing a first oxide layer to fill the first trench by performing an atomic layer deposition (ALD) method; etching a portion of the first oxide layer which is filled into the wide trench; and depositing a second oxide layer by performing a deposition method.

Claims (17)

1. A method for isolating devices on a substrate by forming a trench, comprising the steps of:

forming a patterned pad nitride layer to open at least one isolation region on the substrate;

forming a first trench and a second trench by etching the exposed substrate;

depositing a first oxide layer to fill the first trench and the second trench by performing an atomic layer deposition (ALD) method, wherein one of pyridine and ammonia is used as a catalyst for lowering a reaction activation energy level;

etching a whole portion of the first oxide layer filled into the second trench; and

depositing a second oxide layer in the second trench by performing a deposition method after etching the whole portion of the first oxide layer in the second trench.

2. The method of claim 1 , wherein the deposition method has a higher deposition rate than the ALD method does to thereby completely fill the second trench with the second oxide layer.

3. The method of claim 1 , further includes the step of:

forming an etch stop layer on the substrate prior to depositing the first oxide layer.

4. The method of claim 3 , wherein the etch stop layer is a liner nitride layer.

5. The method of claim 3 , wherein the etch stop layer is formed by performing a low pressure chemical vapor deposition (LP-CVD) method until reaching a thickness ranging from approximately 10 Å to approximately 200 Å.

6. The method of claim 4 , wherein the etch stop layer is formed by performing a LP-CVD method until reaching a thickness ranging from approximately 10 Å to approximately 200 Å.

7. The method of claim 1 , wherein prior to depositing the first oxide layer, a third oxide layer is formed on the substrate by a thermal oxidation process in order to minimize the deposition thickness of the first oxide layer.

8. The method of claim 1 , wherein the first oxide layer is formed by repeatedly performing a cycle of providing alternately a source gas of silicon selected from a group of Si x Cl y , where x representing an atomic ratio of silicon is in a range from approximately 1 to approximately 4 and y representing an atomic ratio of chlorine is in a range from approximately 1 to approximately 8, and a source gas of oxygen into a reaction chamber.

9. The method of claim 1 , wherein after the deposition of the first oxide layer, a thermal process is performed to densify the first oxide layer.

10. The method of claim 2 , wherein the second oxide layer is deposited by performing one of a high density plasma (HDP)-CVD method, an atmospheric pressure (AP)-CVD method and a sub-atmospheric (SA)-CVD method.

11. The method of claim 1 , wherein a width of the second trench is greater than that of the first trench.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2004
From: AHN, SANG-TAE; SHEEN, DONG-SUN; SONG, SEOK-PYO
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 016148/0232 →
Priority Claims (1)
KR 10-2003-0098428 · Dec 29, 2003 · national
Continuity (1)
Related Publication 20050142795A1 · Jun 30, 2005