Manufacturing method of semiconductor device
In a method for manufacturing a semiconductor device by processing of a wafer level, in the case of forming the semiconductor device at the wafer level, on the basis of inspection results on individual semiconductor chips constituting a semiconductor wafer, a treatment for forming a circuit including a rewiring pattern is performed with respect to a semiconductor chip judged as a conforming product and a treatment in which a rewiring pattern is not formed in order to avoid having adverse influence on a semiconductor device of a conforming product or an inspection apparatus in an inspection of a formed semiconductor device after forming the semiconductor device is performed with respect to a semiconductor chip judged as a nonconforming product.
1. A method for manufacturing a semiconductor device at a wafer level, comprising the steps of:
inspecting a plurality of individual semiconductor chips constituting a semiconductor wafer to judge whether each of said plurality of individual semiconductor chips is either a conforming or a nonconforming product;
performing a first treatment to form a circuit including a rewiring pattern with respect to a first semiconductor chip of said plurality of individual semiconductor chips when said first semiconductor chip is judged during inspection to be conforming; and
performing a second treatment to avoid an adverse influence on at least one of the semiconductor device of the conforming product and an inspection apparatus with respect to a second semiconductor chip of said plurality of individual semiconductor chips when the second semiconductor chip is judged during inspection to be nonconforming.
2. The method for manufacturing the semiconductor device as claimed in claim 1 , wherein the second treatment for avoiding the adverse influence with respect to the second semiconductor chip judged as nonconforming includes electrically disconnecting the second semiconductor chip from a circuit electrically connected to an electrode pad of the second semiconductor chip.
3. The method for manufacturing the semiconductor device as claimed in claim 1 , wherein the first treatment for forming the circuit with respect to the first semiconductor chip includes forming a rewiring pattern for electrically connecting an electrode pad of the first semiconductor chip to an external connection terminal, and
wherein the second treatment for avoiding the adverse influence with respect to the second semiconductor chip includes not forming the rewiring pattern and disconnecting an electrode pad of the second semiconductor chip from the external connection terminal.
4. The method for manufacturing the semiconductor device as claimed in claim 3 , wherein the treatment in which the rewiring pattern is not formed with respect to the second semiconductor chip includes:
forming an undercoat metal layer on an electrode terminal formation surface of the semiconductor wafer,
forming a resist pattern, to which a region for forming the rewiring pattern electrically connected to the electrode pad of the second semiconductor chip is exposed, on a surface of the undercoat metal layer,
applying a resist to the region for forming the rewiring pattern resist with respect to the second semiconductor chip so that the region for forming the rewiring pattern is coated with the resist, and
forming a conductor layer resulting in the rewiring pattern in only the first semiconductor chip by performing a plating using the undercoat metal layer as a plating feeding layer with respect to the semiconductor wafer.
5. The method for manufacturing the semiconductor device as claimed in claim 3 , wherein the treatment in which the rewiring pattern is not formed with respect to the second semiconductor chip includes:
forming an undercoat metal layer on an electrode terminal formation surface of the semiconductor wafer,
forming a resist pattern, to which a region for forming the rewiring pattern electrically connected to the electrode pad of the second semiconductor chip is exposed, on a surface of the undercoat metal layer so as to coat the region for forming the rewiring pattern with respect to the second semiconductor chip, and
forming a conductor layer resulting in the rewiring pattern in only the first semiconductor chip by performing a plating using the undercoat metal layer as a plating feeding layer with respect to the semiconductor wafer.