IP Library Granted Patent US 7,200,007
Granted Patent B2
US 7,200,007 · App. 11/129,371 · Granted Apr 3, 2007

Power stack

Assignee: Denso Corporation
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Quick Facts
Patent No.
US 7,200,007
App. No.
11/129,371
Granted
Apr 3, 2007
Kind
B2
Abstract

A power stack includes cooling pipes and semiconductor modules which are alternately laminated. Each cooling pipe includes an inside space dissected into cooling passages in which coolant flows. Both surfaces of the semiconductor module in a laminating direction are brought into contact with surfaces of neighboring cooling pipes. The semiconductor modules are classified into a plurality of groups mutually differentiated in their heat generation rates. And, any two semiconductor modules belonging to the same group having the highest heat generation rate are spaced from each other so that a cooling pipe is not sandwiched between these semiconductor modules in the laminating direction.

Claims (23)

1. A power stack comprising a plurality of cooling pipes and a plurality of semiconductor modules which are alternately laminated, wherein

each of said plurality of cooling pipes includes an inside space dissected into cooling passages in which coolant flows,

both surfaces of said semiconductor module in a laminating direction are brought into contact with surfaces of neighboring cooling pipes,

said plurality of semiconductor modules are classified into a plurality of groups mutually differentiated in their heat generation rates, and

said plurality of semiconductor modules are disposed in such a manner that a pair of semiconductor modules belonging to the same group having the highest heat generation rate are prevented from being adjacent to each other so that any cooling pipe is not sandwiched between said pair of semiconductor modules of the same group in the laminating direction.

2. The power stack in accordance with claim 1 , wherein said groups of semiconductor modules are classified according to controlled object devices of said semiconductor modules.

3. The power stack in accordance with claim 1 , wherein said semiconductor modules and said cooling pipes respectively have a configuration flattened in the laminating direction.

4. The power stack in accordance with claim 1 , wherein said semiconductor modules are repeatedly disposed in the laminating direction according to a predetermined pattern based on said groups.

5. The power stack in accordance with claim 4 , further comprising a control circuit board having a plurality of connecting members to which said plurality of semiconductor modules are respectively connected, wherein

said connecting members are repeatedly disposed in the laminating direction according to a pattern identical with the pattern of said semiconductor modules.

6. The power stack in accordance with claim 1 , further comprising an inlet pipe for introducing said coolant dividedly into said plurality of cooling pipes and an outlet pipe for collecting said coolant from said plurality of cooling pipes after finishing heat exchange, wherein said inlet pipe and said outlet pipe are disposed substantially parallel to each other, and a heat-generating member is interposed between a pre-division section of said inlet pipe and a post-merger section of said outlet pipe.

7. The power stack in accordance with claim 6 , wherein a straight section is provided at a predetermined position of said pre-division section where said heat-generating member is disposed.

8. The power stack in accordance with claim 1 , wherein at least one of said semiconductor modules is a dummy module generating no heat.

9. A power stack comprising a plurality of cooling pipes and a plurality of semiconductor modules which are alternately laminated, wherein

each of said plurality of cooling pipes includes an inside space dissected into cooling passages in which coolant flows,

both surfaces of said semiconductor module in a laminating direction are brought into contact with surfaces of neighboring cooling pipes,

said plurality of semiconductor modules are classified into a plurality of groups mutually differentiated in their heat generation rates, and

said plurality of semiconductor modules are disposed in such a manner that at least two semiconductor modules are disposed along a flow direction of said coolant in the cooling pipe and the heat generation rate of the semiconductor module disposed at an upstream side is not smaller than the heat generation rate of the semiconductor module disposed at a downstream side.

10. The power stack in accordance with claim 9 , wherein said groups are classified according to controlled object devices of said semiconductor module.

11. The power stack in accordance with claim 9 , wherein said semiconductor modules and said cooling pipes respectively have a configuration flattened in the laminating direction.

12. The power stack in accordance with claim 9 , further comprising an inlet pipe for introducing said coolant dividedly into said plurality of cooling pipes and an outlet pipe for collecting said coolant from said plurality of cooling pipes after finishing heat exchange, wherein said inlet pipe and said outlet pipe are disposed substantially parallel to each other, and a heat-generating member is interposed between a pre-division section of said inlet pipe and a post-merger section of said outlet pipe.

13. The power stack in accordance with claim 12 , wherein a straight section is provided at a predetermined position of said pre-division section where said heat-generating member is disposed.

14. The power stack in accordance with claim 9 , wherein at least one of said semiconductor modules is a dummy module generating no heat.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2005
From: YASUI, HIDEHIKO; ISHIYAMA, HIROSHI
To: DENSO CORPORATION
Reel/Frame 016568/0812 →
Priority Claims (1)
JP 2004-147691 · May 18, 2004 · national
Continuity (1)
Related Publication 20050259402A1 · Nov 24, 2005