Method and system for providing short block length low density parity check (LDPC) codes in support of broadband satellite applications
An approach is provided for encoding short frame length Low Density Parity Check (LDPC) codes. An encoder generates a LDPC code having an outer Bose Chaudhuri Hocquenghem (BCH) code. Structure is imposed on the LDPC codes by restricting portion part of the parity check matrix to be lower triangular and/or satisfying other requirements such that the communication between bit nodes and check nodes of the decoder is simplified. Further, a cyclic redundancy check (CRC) encoder is supplied to encode the input signal according to a CRC code. This approach has particular application in digital video broadcast services over satellite.
1. An encoding method for supporting transmission of a Low Density Parity Check (LDPC) coded signal, comprising:
receiving information bits; and
generating, based on the information bits, a Low Density Parity Check (LDPC) code according to one of Tables 1–10 for transmission as the LDPC coded signal, each of the Tables 1–10 specifying address of parity bit accumulators:
TABLE 1
Address of Parity Bit Accumulators (Shortened from Rate 1/2)
20 712 2386 6354 4061 1062 5045 5158
21 2543 5748 4822 2348 3089 6328 5876
22 926 5701 269 3693 2438 3190 3507
23 2802 4520 3577 5324 1091 4667 4449
24 5140 2003 1263 4742 6497 1185 6202
0 4046 6934
1 2855 66
2 6694 212
3 3439 1158
4 3850 4422
5 5924 290
6 1467 4049
7 7820 2242
8 4606 3080
9 4633 7877
10 3884 6868
11 8935 4996
12 3028 764
13 5988 1057
14 7411 3450
TABLE 2
Address of Parity Bit Accumulators (Rate 3/5)
2765 5713 6426 3596 1374 4811 2182 544 3394 2840 4310 771
4951 211 2208 723 1246 2928 398 5739 265 5601 5993 2615
210 4730 5777 3096 4282 6238 4939 1119 6463 5298 6320 4016
4167 2063 4757 3157 5664 3956 6045 563 4284 2441 3412 6334
4201 2428 4474 59 1721 736 2997 428 3807 1513 4732 6195
2670 3081 5139 3736 1999 5889 4362 3806 4534 5409 6384 5809
5516 1622 2906 3285 1257 5797 3816 817 875 2311 3543 1205
4244 2184 5415 1705 5642 4886 2333 287 1848 1121 3595 6022
2142 2830 4069 5654 1295 2951 3919 1356 884 1786 396 4738
0 2161 2653
1 1380 1461
2 2502 3707
3 3971 1057
4 5985 6062
5 1733 6028
6 3786 1936
7 4292 956
8 5692 3417
9 266 4878
10 4913 3247
11 4763 3937
12 3590 2903
13 2566 4215
14 5208 4707
15 3940 3388
16 5109 4556
17 4908 4177
TABLE 3
Address of Parity Bit Accumulators (Rate 2/3)
0 2084 1613 1548 1286 1460 3196 4297 2481 3369 3451 4620 2622
1 122 1516 3448 2880 1407 1847 3799 3529 373 971 4358 3108
2 259 3399 929 2650 864 3996 3833 107 5287 164 3125 2350
3 342 3529
4 4198 2147
5 1880 4836
6 3864 4910
7 243 1542
8 3011 1436
9 2167 2512
10 4606 1003
11 2835 705
12 3426 2365
13 3848 2474
14 1360 1743
0 163 2536
1 2583 1180
2 1542 509
3 4418 1005
4 5212 5117
5 2155 2922
6 347 2696
7 226 4296
8 1560 487
9 3926 1640
10 149 2928
11 2364 563
12 635 688
13 231 1684
14 1129 3894
TABLE 4
Address of Parity Bit Accumulators (Shortened from Rate 3/4)
3 3198 478 4207 1481 1009 2616 1924 3437 554 683 1801
4 2681 2135
5 3107 4027
6 2637 3373
7 3830 3449
8 4129 2060
9 4184 2742
10 3946 1070
11 2239 984
0 1458 3031
1 3003 1328
2 1137 1716
3 132 3725
4 1817 638
5 1774 3447
6 3632 1257
7 542 3694
8 1015 1945
9 1948 412
10 995 2238
11 4141 1907
0 2480 3079
1 3021 1088
2 713 1379
3 997 3903
4 2323 3361
5 1110 986
6 2532 142
7 1690 2405
8 1298 1881
9 615 174
10 1648 3112
11 1415 2808
TABLE 5
Address of Parity Bit Accumulators (Shortened from Rate 4/5)
5 896 1565
6 2493 184
7 212 3210
8 727 1339
9 3428 612
0 2663 1947
1 230 2695
2 2025 2794
3 3039 283
4 862 2889
5 376 2110
6 2034 2286
7 951 2068
8 3108 3542
9 307 1421
0 2272 1197
1 1800 3280
2 331 2308
3 465 2552
4 1038 2479
5 1383 343
6 94 236
7 2619 121
8 1497 2774
9 2116 1855
0 722 1584
1 2767 1881
2 2701 1610
3 3283 1732
4 168 1099
5 3074 243
6 3460 945
7 2049 1746
8 566 1427
9 3545 1168
TABLE 6
Address of Parity Bit Accumulators (Shortened from Rate 5/6)
3 2409 499 1481 908 559 716 1270 333 2508 2264 1702 2805
4 2447 1926
5 414 1224
6 2114 842
7 212 573
0 2383 2112
1 2286 2348
2 545 819
3 1264 143
4 1701 2258
5 964 166
6 114 2413
7 2243 81
0 1245 1581
1 775 169
2 1696 1104
3 1914 2831
4 532 1450
5 91 974
6 497 2228
7 2326 1579
0 2482 256
1 1117 1261
2 1257 1658
3 1478 1225
4 2511 980
5 2320 2675
6 435 1278
7 228 503
0 1885 2369
1 57 483
2 838 1050
3 1231 1990
4 1738 68
5 2392 951
6 163 645
7 2644 1704
TABLE 7
Address of Parity Bit Accumulators (Rate 8/9)
0 1558 712 805
1 1450 873 1337
2 1741 1129 1184
3 294 806 1566
4 482 605 923
0 926 1578
1 777 1374
2 608 151
3 1195 210
4 1484 692
0 427 488
1 828 1124
2 874 1366
3 1500 835
4 1496 502
0 1006 1701
1 1155 97
2 657 1403
3 1453 624
4 429 1495
0 809 385
1 367 151
2 1323 202
3 960 318
4 1451 1039
0 1098 1722
1 1015 1428
2 1261 1564
3 544 1190
4 1472 1246
0 508 630
1 421 1704
2 284 898
3 392 577
4 1155 556
0 631 1000
1 732 1368
2 1328 329
3 1515 506
4 1104 1172
TABLE 8
Address of Parity Bit Accumulators (Rate 1/3)
416 8909 4156 3216 3112 2560 2912 6405 8593 4969 6723 6912
8978 3011 4339 9312 6396 2957 7288 5485 6031 10218 2226 3575
3383 10059 1114 10008 10147 9384 4290 434 5139 3536 1965 2291
2797 3693 7615 7077 743 1941 8716 6215 3840 5140 4582 5420
6110 8551 1515 7404 4879 4946 5383 1831 3441 9569 10472 4306
1505 5682 7778
7172 6830 6623
7281 3941 3505
10270 8669 914
3622 7563 9388
9930 5058 4554
4844 9609 2707
6883 3237 1714
4768 3878 10017
10127 3334 8267
TABLE 9
Address of Parity Bit Accumulators (Shortened from Rate 1/5)
6295 9626 304 7695 4839 4936 1660 144 11203 5567 6347 12557
10691 4988 3859 3734 3071 3494 7687 10313 5964 8069 8296 11090
10774 3613 5208 11177 7676 3549 8746 6583 7239 12265 2674 4292
11869 3708 5981 8718 4908 10650 6805 3334 2627 10461 9285 11120
7844 3079 10773
3385 10854 5747
1360 12010 12202
6189 4241 2343
9840 12726 4977
TABLE 10
Address of Parity Bit Accumulators (Rate 2/5)
5650 4143 8750 583 6720 8071 635 1767 1344 6922 738 6658
5696 1685 3207 415 7019 5023 5608 2605 857 6915 1770 8016
3992 771 2190 7258 8970 7792 1802 1866 6137 8841 886 1931
4108 3781 7577 6810 9322 8226 5396 5867 4428 8827 7766 2254
4247 888 4367 8821 9660 324 5864 4774 227 7889 6405 8963
9693 500 2520 2227 1811 9330 1928 5140 4030 4824 806 3134
1652 8171 1435
3366 6543 3745
9286 8509 4645
7397 5790 8972
6597 4422 1799
9276 4041 3847
8683 7378 4946
5348 1993 9186
6724 9015 5646
4502 4439 8474
5107 7342 9442
1387 8910 2660.
2. A method according to claim 1 , wherein a Bose Chaudhuri Hocquenghem (BCH) outer code is used based on a generator polynomial of:
g ( x )=(1 +x+x 3 +x 5 +x 14 )×(1 +x 6 +x 8 +x 11 +x 14 )×(1 +x+x 2 +x 6 +x 9 +x 10 +x 14 )×(1 +x 4 +x 7 +x 8 +x 10 +x 12 +x 14 )×(1 +x 2 +x 4 +x 6 +x 8 +x 9 +x 11 +x 13 +x 14 )×(1 +x 3 +x 7 +x 8 +x 9 +x 13 +x 14 )×(1 +x 2 +x 5 +x 6 +x 7 +x 10 +x 11 +x 13 +x 14 )×(1 +x 5 +x 8 +x 9 +x 10 +x 11 +x 14 )×(1 +x+x 2 +x 3 +x 9 +x 10 +x 14 )×(1 +x 3 +x 6 +x 9 +x 11 +x 12 +x 14 )×(1+ x 4 +x 11 +x 12 +x 14 )×(1 +x+x 2 +x 3 +x 5 +x 6 +x 7 +x 8 +x 10 +x 13 +x 14 ).
3. A method according to claim 1 , further comprising:
modulating the LDPC coded signal; and
transmitting the modulated signal.
4. A method according to claim 3 , wherein the modulated signal is transmitted over a satellite link in support of a broadband satellite application.
5. A method according to claim 3 , wherein the modulating step is performed according to a signal constellation that includes one of 8-PSK (Phase Shift Keying), 16-QAM (Quadrature Amplitude Modulation), QPSK (Quadrature Phase Shift Keying), 16-APSK (Amplitude Phase Shift Keying) and 32-APSK.
6. A computer-readable medium bearing instructions for supporting transmission of a Low Density Parity Check (LDPC) coded signal; wherein said instructions being arranged, upon execution, to cause one or more processors to perform the method of claim 1 .
7. An encoder for supporting transmission of a Low Density Parity Check (LDPC) coded signal, comprising:
means for receiving information bits; and
means for generating, based on the information bits, an Low Density Parity Check (LDPC) code according to one of Tables 1–10 for transmission as the LDPC coded signal, each of the Tables 1–10 specifying address of parity bit accumulators:
TABLE 1
Address of Parity Bit Accumulators (Shortened from Rate 1/2)
20 712 2386 6354 4061 1062 5045 5158
21 2543 5748 4822 2348 3089 6328 5876
22 926 5701 269 3693 2438 3190 3507
23 2802 4520 3577 5324 1091 4667 4449
24 5140 2003 1263 4742 6497 1185 6202
0 4046 6934
1 2855 66
2 6694 212
3 3439 1158
4 3850 4422
5 5924 290
6 1467 4049
7 7820 2242
8 4606 3080
9 4633 7877
10 3884 6868
11 8935 4996
12 3028 764
13 5988 1057
14 7411 3450
TABLE 2
Address of Parity Bit Accumulators (Rate 3/5)
2765 5713 6426 3596 1374 4811 2182 544 3394 2840 4310 771
4951 211 2208 723 1246 2928 398 5739 265 5601 5993 2615
210 4730 5777 3096 4282 6238 4939 1119 6463 5298 6320 4016
4167 2063 4757 3157 5664 3956 6045 563 4284 2441 3412 6334
4201 2428 4474 59 1721 736 2997 428 3807 1513 4732 6195
2670 3081 5139 3736 1999 5889 4362 3806 4534 5409 6384 5809
5516 1622 2906 3285 1257 5797 3816 817 875 2311 3543 1205
4244 2184 5415 1705 5642 4886 2333 287 1848 1121 3595 6022
2142 2830 4069 5654 1295 2951 3919 1356 884 1786 396 4738
0 2161 2653
1 1380 1461
2 2502 3707
3 3971 1057
4 5985 6062
5 1733 6028
6 3786 1936
7 4292 956
8 5692 3417
9 266 4878
10 4913 3247
11 4763 3937
12 3590 2903
13 2566 4215
14 5208 4707
15 3940 3388
16 5109 4556
17 4908 4177
TABLE 3
Address of Parity Bit Accumulators (Rate 2/3)
0 2084 1613 1548 1286 1460 3196 4297 2481 3369 3451 4620 2622
1 122 1516 3448 2880 1407 1847 3799 3529 373 971 4358 3108
2 259 3399 929 2650 864 3996 3833 107 5287 164 3125 2350
3 342 3529
4 4198 2147
5 1880 4836
6 3864 4910
7 243 1542
8 3011 1436
9 2167 2512
10 4606 1003
11 2835 705
12 3426 2365
13 3848 2474
14 1360 1743
0 163 2536
1 2583 1180
2 1542 509
3 4418 1005
4 5212 5117
5 2155 2922
6 347 2696
7 226 4296
8 1560 487
9 3926 1640
10 149 2928
11 2364 563
12 635 688
13 231 1684
14 1129 3894
TABLE 4
Address of Parity Bit Accumulators (Shortened from Rate 3/4)
3 3198 478 4207 1481 1009 2616 1924 3437 554 683 1801
4 2681 2135
5 3107 4027
6 2637 3373
7 3830 3449
8 4129 2060
9 4184 2742
10 3946 1070
11 2239 984
0 1458 3031
1 3003 1328
2 1137 1716
3 132 3725
4 1817 638
5 1774 3447
6 3632 1257
7 542 3694
8 1015 1945
9 1948 412
10 995 2238
11 4141 1907
0 2480 3079
1 3021 1088
2 713 1379
3 997 3903
4 2323 3361
5 1110 986
6 2532 142
7 1690 2405
8 1298 1881
9 615 174
10 1648 3112
11 1415 2808
TABLE 5
Address of Parity Bit Accumulators (Shortened from Rate 4/5)
5 896 1565
6 2493 184
7 212 3210
8 727 1339
9 3428 612
0 2663 1947
1 230 2695
2 2025 2794
3 3039 283
4 862 2889
5 376 2110
6 2034 2286
7 951 2068
8 3108 3542
9 307 1421
0 2272 1197
1 1800 3280
2 331 2308
3 465 2552
4 1038 2479
5 1383 343
6 94 236
7 2619 121
8 1497 2774
9 2116 1855
0 722 1584
1 2767 1881
2 2701 1610
3 3283 1732
4 168 1099
5 3074 243
6 3460 945
7 2049 1746
8 566 1427
9 3545 1168
TABLE 6
Address of Parity Bit Accumulators (Shortened from Rate 5/6)
3 2409 499 1481 908 559 716 1270 333 2508 2264 1702 2805
4 2447 1926
5 414 1224
6 2114 842
7 212 573
0 2383 2112
1 2286 2348
2 545 819
3 1264 143
4 1701 2258
5 964 166
6 114 2413
7 2243 81
0 1245 1581
1 775 169
2 1696 1104
3 1914 2831
4 532 1450
5 91 974
6 497 2228
7 2326 1579
0 2482 256
1 1117 1261
2 1257 1658
3 1478 1225
4 2511 980
5 2320 2675
6 435 1278
7 228 503
0 1885 2369
1 57 483
2 838 1050
3 1231 1990
4 1738 68
5 2392 951
6 163 645
7 2644 1704
TABLE 7
Address of Parity Bit Accumulators (Rate 8/9)
0 1558 712 805
1 1450 873 1337
2 1741 1129 1184
3 294 806 1566
4 482 605 923
0 926 1578
1 777 1374
2 608 151
3 1195 210
4 1484 692
0 427 488
1 828 1124
2 874 1366
3 1500 835
4 1496 502
0 1006 1701
1 1155 97
2 657 1403
3 1453 624
4 429 1495
0 809 385
1 367 151
2 1323 202
3 960 318
4 1451 1039
0 1098 1722
1 1015 1428
2 1261 1564
3 544 1190
4 1472 1246
0 508 630
1 421 1704
2 284 898
3 392 577
4 1155 556
0 631 1000
1 732 1368
2 1328 329
3 1515 506
4 1104 1172
TABLE 8
Address of Parity Bit Accumulators (Rate 1/3)
416 8909 4156 3216 3112 2560 2912 6405 8593 4969 6723 6912
8978 3011 4339 9312 6396 2957 7288 5485 6031 10218 2226 3575
3383 10059 1114 10008 10147 9384 4290 434 5139 3536 1965 2291
2797 3693 7615 7077 743 1941 8716 6215 3840 5140 4582 5420
6110 8551 1515 7404 4879 4946 5383 1831 3441 9569 10472 4306
1505 5682 7778
7172 6830 6623
7281 3941 3505
10270 8669 914
3622 7563 9388
9930 5058 4554
4844 9609 2707
6883 3237 1714
4768 3878 10017
10127 3334 8267
TABLE 9
Address of Parity Bit Accumulators (Shortened from Rate 1/5)
6295 9626 304 7695 4839 4936 1660 144 11203 5567 6347 12557
10691 4988 3859 3734 3071 3494 7687 10313 5964 8069 8296 11090
10774 3613 5208 11177 7676 3549 8746 6583 7239 12265 2674 4292
11869 3708 5981 8718 4908 10650 6805 3334 2627 10461 9285 11120
7844 3079 10773
3385 10854 5747
1360 12010 12202
6189 4241 2343
9840 12726 4977
TABLE 10
Address of Parity Bit Accumulators (Rate 2/5)
5650 4143 8750 583 6720 8071 635 1767 1344 6922 738 6658
5696 1685 3207 415 7019 5023 5608 2605 857 6915 1770 8016
3992 771 2190 7258 8970 7792 1802 1866 6137 8841 886 1931
4108 3781 7577 6810 9322 8226 5396 5867 4428 8827 7766 2254
4247 888 4367 8821 9660 324 5864 4774 227 7889 6405 8963
9693 500 2520 2227 1811 9330 1928 5140 4030 4824 806 3134
1652 8171 1435
3366 6543 3745
9286 8509 4645
7397 5790 8972
6597 4422 1799
9276 4041 3847
8683 7378 4946
5348 1993 9186
6724 9015 5646
4502 4439 8474
5107 7342 9442
1387 8910 2660.
8. An encoder according to claim 7 , wherein a Bose Chaudhuri Hocquenghem (BCH) outer code is based on a generator polynomial of:
g ( x )=(1 +x+x 3 +x 5 +x 14 )×(1 +x 6 +x 8 +x 11 +x 14 )×(1 +x+x 2 +x 6 +x 9 +x 10 +x 14 )×(1 +x 4 +x 7 +x 8 +x 10 +x 12 +x 14 )×(1 +x 2 +x 4 +x 6 +x 8 +x 9 +x 11 +x 13 +x 14 )×(1 +x 3 +x 7 +x 8 +x 9 +x 13 +x 14 )×(1 +x 2 +x 5 +x 6 +x 7 +x 10 +x 11 +x 13 +x 14 )×(1 +x 5 +x 8 +x 9 +x 10 +x 11 +x 14 )×(1 +x+x 2 +x 3 +x 9 +x 10 +x 14 )×(1 +x 3 +x 6 +x 9 +x 11 +x 12 +x 14 )×(1+ x 4 +x 11 +x 12 +x 14 )×(1 +x+x 2 +x 3 +x 5 +x 6 +x 7 +x 8 +x 10 +x 13 +x 14 ).
9. An encoder according to claim 7 , further comprising:
means for modulating the LDPC coded signal; and
means for transmitting the modulated signal.
10. An encoder according to claim 9 , wherein the modulated signal is transmitted over a satellite link in support of a broadband satellite application.
11. An encoder according to claim 9 , wherein the modulating step is performed according to a signal constellation that includes one of 8-PSK (Phase Shift Keying), 16-QAM (Quadrature Amplitude Modulation), QPSK (Quadrature Phase Shift Keying), 16-APSK (Amplitude Phase Shift Keying) and 32-APSK.
12. A transmitter for supporting transmission of a Low Density Parity Check (LDPC) coded signal, comprising:
a Bose Chaudhuri Hocquenghem (BCH) encoder configured to receive information bits; and
a Low Density Parity Check (LDPC) encoder coupled to the BCH encoder for outputting, based on the information bits, an LDPC code having an outer BCH code according to one of Tables 1–10 for transmission as the LDPC coded signal, each of the Tables 1–10 specifying address of parity bit accumulators:
TABLE 1
Address of Parity Bit Accumulators (Shortened from Rate 1/2)
20 712 2386 6354 4061 1062 5045 5158
21 2543 5748 4822 2348 3089 6328 5876
22 926 5701 269 3693 2438 3190 3507
23 2802 4520 3577 5324 1091 4667 4449
24 5140 2003 1263 4742 6497 1185 6202
0 4046 6934
1 2855 66
2 6694 212
3 3439 1158
4 3850 4422
5 5924 290
6 1467 4049
7 7820 2242
8 4606 3080
9 4633 7877
10 3884 6868
11 8935 4996
12 3028 764
13 5988 1057
14 7411 3450
TABLE 2
Address of Parity Bit Accumulators (Rate 3/5)
2765 5713 6426 3596 1374 4811 2182 544 3394 2840 4310 771
4951 211 2208 723 1246 2928 398 5739 265 5601 5993 2615
210 4730 5777 3096 4282 6238 4939 1119 6463 5298 6320 4016
4167 2063 4757 3157 5664 3956 6045 563 4284 2441 3412 6334
4201 2428 4474 59 1721 736 2997 428 3807 1513 4732 6195
2670 3081 5139 3736 1999 5889 4362 3806 4534 5409 6384 5809
5516 1622 2906 3285 1257 5797 3816 817 875 2311 3543 1205
4244 2184 5415 1705 5642 4886 2333 287 1848 1121 3595 6022
2142 2830 4069 5654 1295 2951 3919 1356 884 1786 396 4738
0 2161 2653
1 1380 1461
2 2502 3707
3 3971 1057
4 5985 6062
5 1733 6028
6 3786 1936
7 4292 956
8 5692 3417
9 266 4878
10 4913 3247
11 4763 3937
12 3590 2903
13 2566 4215
14 5208 4707
15 3940 3388
16 5109 4556
17 4908 4177
TABLE 3
Address of Parity Bit Accumulators (Rate 2/3)
0 2084 1613 1548 1286 1460 3196 4297 2481 3369 3451 4620 2622
1 122 1516 3448 2880 1407 1847 3799 3529 373 971 4358 3108
2 259 3399 929 2650 864 3996 3833 107 5287 164 3125 2350
3 342 3529
4 4198 2147
5 1880 4836
6 3864 4910
7 243 1542
8 3011 1436
9 2167 2512
10 4606 1003
11 2835 705
12 3426 2365
13 3848 2474
14 1360 1743
0 163 2536
1 2583 1180
2 1542 509
3 4418 1005
4 5212 5117
5 2155 2922
6 347 2696
7 226 4296
8 1560 487
9 3926 1640
10 149 2928
11 2364 563
12 635 688
13 231 1684
14 1129 3894
TABLE 4
Address of Parity Bit Accumulators (Shortened from Rate 3/4)
3 3198 478 4207 1481 1009 2616 1924 3437 554 683 1801
4 2681 2135
5 3107 4027
6 2637 3373
7 3830 3449
8 4129 2060
9 4184 2742
10 3946 1070
11 2239 984
0 1458 3031
1 3003 1328
2 1137 1716
3 132 3725
4 1817 638
5 1774 3447
6 3632 1257
7 542 3694
8 1015 1945
9 1948 412
10 995 2238
11 4141 1907
0 2480 3079
1 3021 1088
2 713 1379
3 997 3903
4 2323 3361
5 1110 986
6 2532 142
7 1690 2405
8 1298 1881
9 615 174
10 1648 3112
11 1415 2808
TABLE 5
Address of Parity Bit Accumulators (Shortened from Rate 4/5)
5 896 1565
6 2493 184
7 212 3210
8 727 1339
9 3428 612
0 2663 1947
1 230 2695
2 2025 2794
3 3039 283
4 862 2889
5 376 2110
6 2034 2286
7 951 2068
8 3108 3542
9 307 1421
0 2272 1197
1 1800 3280
2 331 2308
3 465 2552
4 1038 2479
5 1383 343
6 94 236
7 2619 121
8 1497 2774
9 2116 1855
0 722 1584
1 2767 1881
2 2701 1610
3 3283 1732
4 168 1099
5 3074 243
6 3460 945
7 2049 1746
8 566 1427
9 3545 1168
TABLE 6
Address of Parity Bit Accumulators (Shortened from Rate 5/6)
3 2409 499 1481 908 559 716 1270 333 2508 2264 1702 2805
4 2447 1926
5 414 1224
6 2114 842
7 212 573
0 2383 2112
1 2286 2348
2 545 819
3 1264 143
4 1701 2258
5 964 166
6 114 2413
7 2243 81
0 1245 1581
1 775 169
2 1696 1104
3 1914 2831
4 532 1450
5 91 974
6 497 2228
7 2326 1579
0 2482 256
1 1117 1261
2 1257 1658
3 1478 1225
4 2511 980
5 2320 2675
6 435 1278
7 228 503
0 1885 2369
1 57 483
2 838 1050
3 1231 1990
4 1738 68
5 2392 951
6 163 645
7 2644 1704
TABLE 7
Address of Parity Bit Accumulators (Rate 8/9)
0 1558 712 805
1 1450 873 1337
2 1741 1129 1184
3 294 806 1566
4 482 605 923
0 926 1578
1 777 1374
2 608 151
3 1195 210
4 1484 692
0 427 488
1 828 1124
2 874 1366
3 1500 835
4 1496 502
0 1006 1701
1 1155 97
2 657 1403
3 1453 624
4 429 1495
0 809 385
1 367 151
2 1323 202
3 960 318
4 1451 1039
0 1098 1722
1 1015 1428
2 1261 1564
3 544 1190
4 1472 1246
0 508 630
1 421 1704
2 284 898
3 392 577
4 1155 556
0 631 1000
1 732 1368
2 1328 329
3 1515 506
4 1104 1172
TABLE 8
Address of Parity Bit Accumulators (Rate 1/3)
416 8909 4156 3216 3112 2560 2912 6405 8593 4969 6723 6912
8978 3011 4339 9312 6396 2957 7288 5485 6031 10218 2226 3575
3383 10059 1114 10008 10147 9384 4290 434 5139 3536 1965 2291
2797 3693 7615 7077 743 1941 8716 6215 3840 5140 4582 5420
6110 8551 1515 7404 4879 4946 5383 1831 3441 9569 10472 4306
1505 5682 7778
7172 6830 6623
7281 3941 3505
10270 8669 914
3622 7563 9388
9930 5058 4554
4844 9609 2707
6883 3237 1714
4768 3878 10017
10127 3334 8267
TABLE 9
Address of Parity Bit Accumulators (Shortened from Rate 1/5)
6295 9626 304 7695 4839 4936 1660 144 11203 5567 6347 12557
10691 4988 3859 3734 3071 3494 7687 10313 5964 8069 8296 11090
10774 3613 5208 11177 7676 3549 8746 6583 7239 12265 2674 4292
11869 3708 5981 8718 4908 10650 6805 3334 2627 10461 9285 11120
7844 3079 10773
3385 10854 5747
1360 12010 12202
6189 4241 2343
9840 12726 4977
TABLE 10
Address of Parity Bit Accumulators (Rate 2/5)
5650 4143 8750 583 6720 8071 635 1767 1344 6922 738 6658
5696 1685 3207 415 7019 5023 5608 2605 857 6915 1770 8016
3992 771 2190 7258 8970 7792 1802 1866 6137 8841 886 1931
4108 3781 7577 6810 9322 8226 5396 5867 4428 8827 7766 2254
4247 888 4367 8821 9660 324 5864 4774 227 7889 6405 8963
9693 500 2520 2227 1811 9330 1928 5140 4030 4824 806 3134
1652 8171 1435
3366 6543 3745
9286 8509 4645
7397 5790 8972
6597 4422 1799
9276 4041 3847
8683 7378 4946
5348 1993 9186
6724 9015 5646
4502 4439 8474
5107 7342 9442
1387 8910 2660.
13. A transmitter according to claim 12 , wherein the BCH outer code is based on a generator polynomial of:
g ( x )=(1 +x+x 3 +x 5 +x 14 )×(1 +x 6 +x 8 +x 11 +x 14 )×(1 +x+x 2 +x 6 +x 9 +x 10 +x 14 )×(1 +x 4 +x 7 +x 8 +x 10 +x 12 +x 14 )×(1 +x 2 +x 4 +x 6 +x 8 +x 9 +x 11 +x 13 +x 14 )×(1 +x 3 +x 7 +x 8 +x 9 +x 13 +x 14 )×(1 +x 2 +x 5 +x 6 +x 7 +x 10 +x 11 +x 13 +x 14 )×(1 +x 5 +x 8 +x 9 +x 10 +x 11 +x 14 )×(1 +x+x 2 +x 3 +x 9 +x 10 +x 14 )×(1 +x 3 +x 6 x 9 +x 11 +x 12 +x 14 )×(1+ x 4 +x 11 +x 12 +x 14 )×(1 +x+x 2 +x 3 +x 5 +x 6 +x 7 +x 8 +x 10 +x 13 +x 14 ).
14. A transmitter according to claim 12 , further comprising:
a modulator configured to modulate the LDPC coded signal.
15. A transmitter according to claim 14 , wherein the modulated signal is transmitted over a satellite link in support of a broadband satellite application.
16. A transmitter according to claim 14 , wherein the modulating step is performed according to a signal constellation that includes one of 8-PSK (Phase Shift Keying), 16-QAM (Quadrature Amplitude Modulation), QPSK (Quadrature Phase Shift Keying), 16-APSK (Amplitude Phase Shift Keying) and 32-APSK.