IP Library Granted Patent US 7,359,591
Granted Patent B2
US 7,359,591 · App. 11/488,389 · Granted Apr 15, 2008

Electrical/optical integration scheme using direct copper bonding

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,359,591
App. No.
11/488,389
Granted
Apr 15, 2008
Kind
B2
Abstract

An electro-optic semiconductor package and fabrication method provides enhanced performance. An integrated circuit (IC) having one or more IC contact pads is provided, where the IC contact pads are connected to an IC on the IC wafer. An intermediate wafer having one or more intermediate contact pads is provided, where the intermediate contact pads are connected to an electro-optic arrangement on the intermediate wafer. The method further provides for direct copper bonding the IC contact pads to adjacent intermediate contact pads such that an electro-optic semiconductor package results.

Claims (11)

1. A method of fabricating an intermediate wafer, the method comprising:

disposing a waveguide within the intermediate wafer,

positioning an optical coupler adjacent to the waveguide within the intermediate wafer, the coupler enabling transport of an optical signal and one or more intermediate contact pads of the intermediate wafer enabling transport of an electrical signal,

wherein the intermediate contact pads comprises copper and configured for forming direct copper bonds with an IC substrate, the direct copper bonds eliminating bonding gaps between the intermediate wafer and the IC substrate for improving transmission performance; and

positioning an electro-optic converter between the optical coupler and the intermediate contact pads, the converter enabling conversion between the optical signal and the electrical signal.

2. The method of claim 1 further including positioning an optical detector between the optical coupler and one or more of the intermediate pads, the detector enabling conversion of the optical signal into the electrical signal.

3. The method of claim 1 further including:

coupling a release layer to a surface of the intermediate wafer; and

coupling a handle to the release layer.

4. The method of claim 3 further including removing the release layer after direct copper bonding one or more IC contact pads to the intermediate contact pads.

5. The method of claim 4 further including etching away the release layer.

Continuity (2)
Division 1002091100 · Dec 19, 2001
Related Publication 20060258120A1 · Nov 16, 2006