Method and apparatus for balancing active capacitor leakage current
A circuit that provides a method and apparatus to actively balance capacitor leakage current from series stacked capacitors and disconnects itself when stacked capacitors are configured for doubler operation. In one embodiment, the active circuit includes high voltage low current transistors, such as for example a PNP bipolar transistor and an NPN bipolar transistor, that are configured in a sink-source voltage follower arrangement with the bases of the transistors connected to a voltage divider network and referenced to a fraction of a DC input voltage with a very high impedance, low dissipative resistor divider network. In one embodiment, the emitters of the PNP and NPN transistors are both tied to the connection point between capacitors in the stack and provide an active sink-source drive, which maintains the voltage at this point to be bounded by the input reference voltages of sink-source followers.
1. An AC to DC power conversion circuit for multiple different input voltages, comprising:
a first capacitor having first and second terminals;
a second capacitor having first and second terminals, the first terminal of the second capacitor coupled to the second terminal of the first capacitor;
a bridge rectifier having first and second output terminals, the first output terminal of the bridge rectifier coupled to the first terminal of the first capacitor, the second output terminal of the bridge rectifier coupled to the second terminal of the second capacitor;
a switch coupled between an AC input terminal of the bridge rectifier and a terminal comprising the first terminal of the second capacitor and the second terminal of the first capacitor;
a first transistor coupled across the first capacitor;
a second transistor coupled across the second capacitor, wherein the first and second transistors are coupled to provide a bleed current to the first and second capacitors to balance a leakage current imbalance in the first and second capacitors; and
a resistor divider network coupled to generate at least a first input reference and a second input reference, the first input reference greater than the second input reference, the first and second input reference coupled to respective control terminals of the second and first transistors, respectively.
2. The AC to DC power conversion circuit of claim 1 wherein the resistor divider network comprises at least two resistors coupled to the respective control terminals of the first and second transistors.
3. The AC to DC power conversion circuit of claim 1 wherein the first and second transistors are coupled to the second terminal of the first capacitor and the first terminal of the second capacitor, the first and second transistors adapted to maintain a voltage at the second terminal of the first capacitor and the first terminal of the second capacitor within an input reference range.
4. The AC to DC power conversion circuit of claim 1 wherein the bleed current is substantially equal to the leakage current imbalance in the first and second capacitors.
5. The AC to DC power conversion circuit of claim 1 wherein the bleed current is substantially equal to zero when a voltage at the second terminal of the first capacitor and the first terminal of the second capacitor remains fixed at a voltage within an input reference range.
6. The AC to DC power conversion circuit of claim 1 wherein the first and second transistors are coupled in a sink-source follower circuit configuration.
7. The AC to DC power conversion circuit of claim 6 wherein the sink-source follower circuit is coupled to receive first and second input references that are offset from a fraction of a voltage between the first terminal of the first capacitor and the second terminal of the second capacitor.
8. The AC to DC power conversion circuit of claim 7 wherein the first and second input references define a range of voltages including upper and lower reference voltages, respectively, each of which is offset from the fraction of the voltage between the first terminal of the first capacitor and the second terminal of the second capacitor.
9. The AC to DC power conversion circuit of claim 6 wherein the first and second transistors comprise bipolar junction transistors.
10. The AC to DC power conversion circuit of claim 9 wherein the first and second transistors comprise a PNP transistor and an NPN transistor.
11. The AC to DC power conversion circuit of claim 1 wherein the circuit is an active circuit included in a power supply circuit.