IP Library Granted Patent US 7,402,901
Granted Patent B2
US 7,402,901 · App. 11/366,123 · Granted Jul 22, 2008

Semiconductor device and method of manufacturing semiconductor device

Assignee: Sony Corporation
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Quick Facts
Patent No.
US 7,402,901
App. No.
11/366,123
Granted
Jul 22, 2008
Kind
B2
Abstract

The present invention provides a semiconductor device that is inexpensive and can suppress signal transmission delay, and a manufacturing method thereof. The semiconductor device includes: a plurality of semiconductor chips; a semiconductor substrate that has, on the same surface thereof, a chip-to-chip interconnection for electrically connecting the plurality of semiconductor chips to each other, and a plurality of chip-connection pads connected to the chip-to-chip interconnection; and a wiring board that has a plurality of lands of which pitch is larger than a pitch of the chip-connection pads, wherein a major surface of each of the plurality of semiconductor chips is connected to the chip-connection pads via a first connector so that the plurality of semiconductor chips are mounted on the semiconductor substrate, and an external-connection pad is formed on the major surface other than a region facing the semiconductor substrate, and is connected to the land on the wiring board via a second connector.

Claims (15)

1. A semiconductor device comprising:

a plurality of semiconductor chips adjacent to one another;

a semiconductor substrate that has, on the same surface thereof, a chip-to-chip interconnection for electrically connecting the plurality of adjacent semiconductor chips to each other, and a plurality of chip-connection pads connected to the chip-to-chip interconnection; and

a wiring board that has a plurality of lands of which pitch is larger than a pitch of the chip-connection pads, wherein

a major surface of each of the plurality of semiconductor chips is connected to the chip-connection pads via a first connector so that the plurality of semiconductor chips are mounted on the semiconductor substrate, and

an external-connection pad is formed on the major surface other than a region facing the semiconductor substrate, and is connected to the land on the wiring board via a second connector.

2. The semiconductor device according to claim 1 , wherein

the semiconductor substrate is located in a hollow formed in the wiring board.

3. The semiconductor device according to claim 2 , wherein

a resin material is provided in the hollow in a manner of surrounding the semiconductor substrate, and the semiconductor substrate is bonded to the wiring board via the resin material.

4. A semiconductor device comprising:

a plurality of semiconductor chips adjacent to one another; and

a semiconductor substrate that has, on the same surface thereof, a chip-to-chip interconnection for electrically connecting the plurality of adjacent semiconductor chips to each other, and a plurality of chip-connection pads connected to the chip-to-chip interconnection, wherein

a major surface of each of the plurality of semiconductor chips is connected to the chip-connection pads via a connector so that the plurality of semiconductor chips are mounted on the semiconductor substrate, and

a plurality of external-connection pads are formed on the major surface other than a region facing the semiconductor substrate, the external-connection pads having a pitch larger than a pitch of the chip-connection pads.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2006
From: HATANO, MASAKI; TAKAOKA, YUJI
To: SONY CORPORATION
Reel/Frame 017800/0052 →
Priority Claims (1)
JP P2005-075165 · Mar 16, 1920 · national
Continuity (1)
Related Publication 20060226527A1 · Oct 12, 2006