IP Library Granted Patent US 7,449,718
Granted Patent B2
US 7,449,718 · App. 10/749,552 · Granted Nov 11, 2008

Semiconductor device and method of manufacturing thereof

Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 7,449,718
App. No.
10/749,552
Granted
Nov 11, 2008
Kind
B2
Abstract

The manufacturing method of a semiconductor device according to the present invention comprises steps of forming a metal film, an insulating film, and an amorphous semiconductor film in sequence over a first substrate; crystallizing the metal film and the amorphous semiconductor film; forming a first semiconductor element by using the crystallized semiconductor film as an active region; attaching a support to the first semiconductor element by using an adhesive; causing separation between the metal film and the insulating film; attaching a second substrate to the separated insulating film; separating the support by removing the adhesive; forming an amorphous semiconductor film over the first semiconductor element; and forming a second semiconductor element using the amorphous semiconductor film as an active region.

Claims (45)

1. An electronic device comprising:

a printed wiring board;

a first wiring layer and a second wiring layer on the printed wiring board;

a first semiconductor element using a crystalline semiconductor film as a first active region and a second semiconductor element using an amorphous semiconductor film as a second active region over an adhesive;

a third wiring layer connecting the first semiconductor element and electrically connecting to the first wiring layer; and

a fourth wiring layer connecting the second semiconductor element and electrically connecting to the second wiring layer;

wherein the amorphous semiconductor film is located above the crystalline semiconductor film.

2. An electronic device comprising:

a printed wiring board;

a first wiring layer and a second wiring layer on the printed wiring board;

a first semiconductor element using a crystalline semiconductor film as a first active region and a second semiconductor element using an amorphous semiconductor film as a second active region over a plastic substrate;

a third wiring layer connecting the first semiconductor element and electrically connecting to the first wiring layer; and

a fourth wiring layer connecting the second semiconductor element and electrically connecting to the second wiring layer;

wherein the amorphous semiconductor film is located above the crystalline semiconductor film.

3. An electronic device comprising:

a printed wiring board;

a first wiring layer and a second wiring layer on the printed wiring board;

a first semiconductor element using a crystalline semiconductor film as a first active region and a second semiconductor element using an amorphous semiconductor film as a second active region over an adhesive;

a third wiring layer connecting the first semiconductor element and electrically connecting to the first wiring layer; and

a fourth wiring layer connecting the second semiconductor element and electrically connecting to the second wiring layer;

wherein the first semiconductor element and the second semiconductor element are electrically connected to each other, and

wherein the amorphous semiconductor film is located above the crystalline semiconductor film.

4. An electronic device comprising:

a printed wiring board;

a first wiring layer and a second wiring layer on the printed wiring board;

a first semiconductor element using a crystalline semiconductor film as a first active region and a second semiconductor element using an amorphous semiconductor film as a second active region over a plastic substrate;

a third wiring layer connecting the first semiconductor element and electrically connecting to the first wiring layer; and

a fourth wiring layer connecting the second semiconductor element and electrically connecting to the second wiring layer;

wherein the first semiconductor element and the second semiconductor element are electrically connected to each other, and

wherein the amorphous semiconductor film is located above the crystalline semiconductor film.

5. The electronic device according to claim 1 or 3 , wherein the adhesive is provided with exfoliate paper.

6. The semiconductor electronic device according to any one of claims 1 to 4 , wherein the first semiconductor element is a thin film transistor.

7. The electronic device according to any one of claims 1 to 4 , wherein the second semiconductor element is a diode or a thin film transistor.

8. The electronic device according to any one of claims 1 to 4 , wherein the semiconductor device includes an optical sensor, a photoelectric conversion element, or a solar battery.

9. An electronic device comprising:

a controller over a printed wiring board;

a power supply circuit over the printed wiring board;

a first wiring layer and a second wiring layer on the printed wiring board;

an optical sensor over the printed wiring board comprising a first semiconductor element using a crystalline semiconductor film as a first active region and a second semiconductor element using an amorphous semiconductor film as a second active region over a plastic substrate;

a third wiring layer connecting the first semiconductor element and electrically connecting to the first wiring layer; and a fourth wiring layer connecting the second semiconductor element and electrically connecting to the second wiring layer.

10. The electronic device according to claim 9 , wherein the first semiconductor element is a thin film transistor.

11. The electronic device according to claim 9 , wherein the second semiconductor element is a diode or a thin film transistor.

12. The electronic device according to claim 9 , wherein the semiconductor device is a module of an electronic device.

13. The electronic device according to claim 9 , wherein the semiconductor device is provided with a panel having a pixel portion, a scanning line driver circuit, and a signal line driver circuit.

14. The electronic device according to claim 9 , wherein the optical sensor is provided through an FPC.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 2, 2004
From: NISHI, KAZUO; TAKAYAMA, TORU; GOTO, YUUGO
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 014860/0302 →
Priority Claims (1)
JP 2003-002667 · Jan 8, 2003 · national
Continuity (1)
Related Publication 20050056842A1 · Mar 17, 2005