Pillar P-i-n semiconductor diodes
View Patent ↗An arrangement of pillar shaped p-i-n diodes having a high aspect ration are formed on a semiconductor substrate. Each device is formed by an intrinsic or lightly doped region (i-region) positioned between a P+ region and an N+ region at each end of the pillar. The arrangement of pillar p-i-n diodes is embedded in an optical transparent medium. For a given surface area, more light energy is absorbed by the pillar arrangement of p-i-n diodes than by conventional planar p-i-n diodes. The pillar p-i-n diodes are preferably configured in an array formation to enable photons reflected from one pillar p-i-n diode to be captured and absorbed by another p-i-n diode adjacent to the first one, thereby optimizing the efficiency of energy conversion.
1. A semiconductor device comprising at least a first and a second pillar p-i-n diodes, said first and second pillar p-i-n diodes having a middle intrinsic region positioned between an n-doped region and a p-doped region, wherein light energy reflected by said first p-i-n diode is absorbed by said second p-i-n diode, said at least first and second pillar p-i-n diodes being replicated and arranged in an array configuration having an area efficiency given by equation:
( h/r )π /n 2 >1,
wherein h is the pillar height, r is a radius at the bottom of the pillar, and n is a ratio of the pillar center-to-center spacing to the radius r at the bottom of the pillar.
2. The semiconductor device recited in claim 1 , wherein said at least first and second pillar p-i-n diodes are immersed in an optically transparent medium.
3. The semiconductor device as recited in claim 1 wherein each of said at least first and second pillar p-i-n diodes comprises a first electrode connected to said p-doped region, and a second electrode connected to said n-doped region.
4. The semiconductor device as recited in claim 1 , wherein each of said at least first and second pillar p-i-n diodes have an aspect ratio ranging from 5 to 50.
5. The semiconductor device as recited in claim 4 , wherein each of said pillar p-i-n diodes is made of silicon comprising an intrinsic or lightly doped region sandwiched between said p-doped region and n-doped region at respective ends of said pillar p-i-n diodes.
6. The semiconductor device as recited in claim 3 wherein said first electrode is an optically transparent conductor.
7. The semiconductor device as recited in claim 4 , wherein said pillars have a tapered profile.
8. The semiconductor device as recited in claim 5 , wherein surface areas of said p-i-n diodes are exposed to light.
9. The semiconductor device as recited in claim 1 wherein said p-i-n diode array form a photo-electronic conversion device.
10. The semiconductor device as recited in claim 9 , wherein said array is embedded in an optically transparent dielectric layer.
11. The semiconductor device as recited in claim 3 , wherein said first electrode is made of titanium oxide (TiO).
12. An arrangement of semiconductor devices formed on a semiconductor substrate, comprising a plurality of p-i-n diodes exposed to light, each comprising a pillar formed by an intrinsic (i) region positioned between a p-doped region and an n-doped region, each of said p-i-n diodes having respectively a surface of the i-region that is greater than an area of contact between said p-doped region and said i-region.
13. The arrangement of p-i-n devices as recited in claim 12 wherein light energy reflected from a first p-i-n diode is absorbed by a second one of said p-i-n diodes.
14. The arrangement of p-i-n devices as recited in claim 12 , wherein said respective p-doped regions are transparent.