IP Library Granted Patent US 7,595,804
Granted Patent B2
US 7,595,804 · App. 10/713,321 · Granted Sep 29, 2009

Systems and methods for displaying individual processor usage in a multiprocessor system

Assignee: Unisys Corporation
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Quick Facts
Patent No.
US 7,595,804
App. No.
10/713,321
Filed
Nov 14, 2003
Granted
Sep 29, 2009
Kind
B2
Art Unit
2629
USPC
345/1.2
Abstract

A display of CPU utilization in a multiprocessor system is provided. This feature illustrates processor utilization and application group assignments to CPUs and clusters of CPUs. Various graphic indicator are described that can be used to display processor utilization and indicate processors that have no application group assignments. For example, bar graphs as well as gauge displays can be used to visually convey processor utilization. As a result, a user can visually determine the processor utilization and application group assignments across a multiprocessor system. Additionally, various colors and shadings can be used to visually convey application group assignments.

Claims (35)

1. A method comprising:

displaying on a display of a display device a first graphic indicative of a processor usage for each one of at least two processors in a multiprocessor system, the processor usage comprising processor assignment, processor availability, and clustering; and

displaying on said display device a second graphic indicative of an application assignment for each one of at least two application groups associated with each of said at least two processors.

2. The method as recited in claim 1 wherein said second graphic comprises a color indicative of the application assignment for each one of the at least two application groups.

3. The method as recited in claim 1 further comprising a graphic indicator indicating a group of said at least two processors wherein said group is indicative of a processor clustering.

4. The method as recited in claim 1 further comprising a graphic indicator of processor utilization associated with each of said at least two processors.

5. The method as recited in claim 4 wherein said graphic indicator comprises a gauge.

6. The method as recited in claim 5 wherein the gauge includes bands that reflect ranges of processor utilization.

7. The method as recited in claim 4 wherein said graphic indicator comprises a bar.

8. The method as recited in claim 1 wherein blocks associated with the second graphic indicate an application group assigned to a processor.

9. The method as recited in claim 1 wherein each one of the at least two application groups comprises at least one independently, computer-executable process.

10. An apparatus comprising:

a memory;

a display device in electrical communication with a multiprocessor system having at least two processors, the display device having a display;

computer-executable instructions stored in said memory and operable to display on said display device a first graphic indicative of a processor usage for each one of the at least two processors, the processor usage comprising processor assignment, processor availability, and clustering; and

computer-executable instructions stored in said memory and operable to display on said display device a second graphic indicative of an application assignment for each one of at least two application groups associated with each of said at least two processors.

11. The apparatus as recited in claim 10 wherein said second graphic comprises a color indicative of the application assignment for each one of the at least two application groups.

12. The apparatus as recited in claim 10 further comprising a graphic indicator indicating a group of said at least two processors wherein said group is indicative of a processor clustering.

13. The apparatus as recited in claim 12 further comprising a graphic indicator of processor utilization associated with each of said at least two processors.

14. The apparatus as recited in claim 13 wherein said graphic indicator comprises a gauge.

15. The apparatus as recited in claim 14 wherein the gauge includes bands that reflect ranges of processor utilization.

16. The apparatus as recited in claim 13 wherein said graphic indicator comprises a bar.

17. The apparatus as recited in claim 10 wherein blocks associated with the second graphic indicate an application group assigned to a processor.

18. The apparatus as recited in claim 10 wherein each one of the at least two application groups comprises at least one independently, computer-executable process.

19. A computer-readable medium bearing computer readable instructions for carrying out the acts comprising:

displaying on a display of a display device a first graphic indicative of a processor usage for each one of at least two processors in a multiprocessor system, the processor usage comprising processor assignment, processor availability, and clustering; and

displaying on said display device a second graphic indicative of an application assignment for each one of at least two application groups associated with each of said at least two processors.

20. The computer readable medium as recited in claim 19 wherein said second graphic comprises a color indicative of the application assignment for each one of the at least two application groups.

21. The computer-readable medium as recited in claim 19 further comprising a graphic indicator indicating a group of said at least two processors wherein said group is indicative of a processor clustering.

22. The computer-readable medium as recited in claim 19 further comprising a graphic indicator of processor utilization associated with each of said at least two processors.

23. The computer-readable medium as recited in claim 22 wherein said graphic indicator comprises a gauge.

24. The computer-readable medium as recited in claim 23 wherein said gauge comprises bands that reflect ranges of processor utilization.

25. The computer-readable medium as recited in claim 22 wherein said graphic indicator comprises a bar.

26. The computer-readable medium as recited in claim 19 wherein blocks associated with the second graphic indicate an application group assigned to a processor.

27. The computer-readable medium as recited in claim 19 wherein each one of the at least two application groups comprises at least one independently, computer-executable process.

Assignments (13)
AMENDED AND RESTATED PATENT SECURITY AGREEMENT Recorded Jun 27, 2025
From: UNISYS CORPORATION; UNISYS HOLDING CORPORATION; UNISYS NPL, INC.; UNISYS AP INVESTMENT COMPANY I
To: COMPUTERSHARE TRUST COMPANY, N.A., AS COLLATERAL TRUSTEE
Reel/Frame 071759/0527 →
SECURITY INTEREST Recorded Nov 19, 2020
From: UNISYS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 054481/0865 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2020
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: UNISYS CORPORATION
Reel/Frame 054231/0496 →
RELEASE OF SECURITY INTEREST Recorded Nov 9, 2017
From: WELLS FARGO BANK, NATIONAL ASSOCIATION (SUCCESSOR TO GENERAL ELECTRIC CAPITAL CORPORATION)
To: UNISYS CORPORATION
Reel/Frame 044416/0358 →
SECURITY INTEREST Recorded Oct 6, 2017
From: UNISYS CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 044144/0081 →
PATENT SECURITY AGREEMENT Recorded Apr 27, 2017
From: UNISYS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
Reel/Frame 042354/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 26, 2013
From: DEUTSCHE BANK TRUST COMPANY AMERICAS, AS COLLATERAL TRUSTEE
To: UNISYS CORPORATION
Reel/Frame 030082/0545 →
RELEASE OF SECURITY INTEREST Recorded Mar 15, 2013
From: DEUTSCHE BANK TRUST COMPANY
To: UNISYS CORPORATION
Reel/Frame 030004/0619 →
SECURITY AGREEMENT Recorded Jun 27, 2011
From: UNISYS CORPORATION
To: GENERAL ELECTRIC CAPITAL CORPORATION, AS AGENT
Reel/Frame 026509/0001 →
SECURITY AGREEMENT Recorded May 7, 2010
From: UNISYS CORPORATION
To: DEUTSCHE BANK
Reel/Frame 024351/0546 →
RELEASE BY SECURED PARTY Recorded Jul 31, 2009
From: CITIBANK, N.A.
To: UNISYS CORPORATION; UNISYS HOLDING CORPORATION
Reel/Frame 023086/0255 →
SECURITY AGREEMENT Recorded Jun 20, 2006
From: UNISYS CORPORATION; UNISYS HOLDING CORPORATION
To: CITIBANK, N.A.
Reel/Frame 018003/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2003
From: SHIMIZU, CLIFFORD SHIROKU
To: UNISYS CORPORATION
Reel/Frame 014799/0346 →
Continuity (1)
Related Publication 20050104799A1 · May 19, 2005