Granted Patent B2

US 7,612,447 · App. 11/758,833 · Granted Nov 3, 2009

Assignee: GM Global Technology Operations, Inc.

Abstract

Claims (41)

1. A semiconductor device, comprising:

a wafer having first and second opposed metallized major faces;

a transistor bonded to the first metallized face of the wafer, wherein the transistor includes a first surface, and wherein the first surface defines a first area;

a first metal layer bonded to the first surface of the transistor, wherein the first metal layer has a first surface that defines a second area larger than the first area of the transistor, wherein the first metal layer has a plurality of extended perimeter areas, the plurality of extended perimeter areas including a first extended perimeter area extending from a first side of the first metal layer and forming a contact, a second extended perimeter area extending from a second side of the first metal layer, and a third extended perimeter area extending from a third side of the first metal layer; and

a ceramic layer bonded to the first surface of the first metal layer.

2. The semiconductor device of claim 1 , wherein the ceramic layer has a first surface that defines a third area smaller than the second area of the first metal layer.

3. The semiconductor device of claim 1 , wherein the plurality of extended perimeter areas includes a fourth extended perimeter area extending from a fourth side of the first metal layer.

4. The semiconductor device of claim 1 , further comprising:

a diode disposed adjacent to the transistor, bonded to the first metallized face of the ceramic wafer, and having a first surface defining a first area,

a second metal layer bonded to the first surface of the diode and having a first surface defining a second area; and

a second ceramic layer bonded to the first surface of the second metal layer and having a first surface defining a third area, wherein the second area of the first surface of the second metal layer is greater than the first area of the first surface of the diode.

5. The semiconductor device of claim 4 , wherein the second area of the first surface of the second metal layer is greater than the third area of the first surface of the second ceramic layer.

6. The semiconductor device of claim 4 , wherein the second metal layer has a plurality of extended perimeter areas.

7. The semiconductor device of claim 6 , wherein the second metal layer has a contact area extending from a first side, and wherein the plurality of extended perimeter areas includes a first extended perimeter area extending from a second side, a second extended perimeter area extending from a third side, and a third extended perimeter area extending from a fourth side.

8. The semiconductor device of claim 1 , wherein the transistor is an insulated gate bipolar transistor (IGBT).

9. A semiconductor module, comprising:

a housing having a cavity therein;

at least one semiconductor device residing within the cavity, wherein the at least one semiconductor device comprises:

a wafer having first and second opposed metallized major faces;

a transistor bonded to the first metallized face of the wafer, wherein the transistor includes a first surface, and wherein the first surface defines a first area;

a first metal layer bonded to the first surface of the transistor, wherein the first metal layer has a first surface that defines a second area larger than the first area of the transistor, wherein the first metal layer has a plurality of extended perimeter areas, the plurality of extended perimeter areas including a first extended perimeter area extending from a first side of the first metal layer and forming a contact, a second extended perimeter area extending from a second side of the first metal layer, and a third extended perimeter area extending from a third side of the first metal layer;

a ceramic layer bonded to the first metal layer; and

a cooling system comprising:

a flow passageway through the housing and fluidly coupled to the cavity, wherein said cooling system is configured to circulate a coolant fluid through said the flow passageway and in contact with the first metal layer of the at least one semiconductor device.

10. The semiconductor module of claim 9 , wherein the ceramic layer has a first surface that defines a third area smaller than the second area of first metal layer.

11. The semiconductor module of claim 9 , wherein the cooling system is configured to contact the plurality of extended perimeter areas with the coolant fluid.

12. The semiconductor module of claim 11 , wherein the first metal layer has a fourth extended perimeter area extending from a fourth side of the first metal layer.

13. The semiconductor module of claim 9 , further comprising:

a diode disposed adjacent to the transistor, bonded to the first metallized face of the ceramic wafer, and having a first surface defining a first area,

a second metal layer bonded to the a first surface of the diode and having a first surface defining a second area, and

a second ceramic layer bonded to the first surface of the second metal layer and having a first surface defining a third area, wherein the second area of the first surface of the second metal layer is greater than the first area of the first surface of the diode, and wherein the cooling system is further configured to contact the second metal layer of the at least one semiconductor device with the coolant fluid.

14. The semiconductor module of claim 13 , wherein the second area of the first surface of the second metal layer is greater than the third area of the first surface of the second ceramic layer.

15. The semiconductor module of claim 13 , wherein the second metal layer has a plurality of extended perimeter areas, and wherein the cooling system is configured to deliver the coolant fluid in contact with the plurality of extended perimeter areas of the second metal layer.

16. The semiconductor module of claim 15 , wherein the second metal layer has a contact area extending from a first side, and wherein the plurality of extended perimeter areas includes a first extended perimeter area extending from a second side, a second extended perimeter area extending from a third side, and a third extended perimeter area extending from a fourth side.

17. A method for cooling a semiconductor device with a first metal layer bonded to a transistor, the first metal layer having at least three sides with extended perimeter areas, the method comprising the steps of:

circulating a coolant fluid through a flow passageway;

directing the coolant fluid onto the extended perimeter areas on the at least three sides of the first metal layer of the semiconductor device; and

collecting the coolant fluid and recirculating the coolant fluid through the flow passageway.

18. The method of claim 17 , wherein semiconductor device further comprises a second metal layer bonded to a diode disposed adjacent to the transistor, the second metal layer having at least two sides with extended perimeter areas, and wherein the method further comprises the step of directing the coolant fluid additionally onto the extended perimeter areas on the at least two sides of the second metal layer.

19. The semiconductor device of claim 6 , wherein the second metal layer has a contact area extending from a first side of the second metal layer, and wherein the plurality of extended perimeter areas includes a first extended perimeter area extending from a second side of the second metal layer, and a second extended perimeter area extending from a third side of the second metal layer.

20. The semiconductor module of claim 15 , wherein the second metal layer has a contact area extending from a first side of the second metal layer, and wherein the plurality of extended perimeter areas includes a first extended perimeter area extending from a second side of the second metal layer, and a second extended perimeter area extending from a third side of the second metal layer.

Assignments (12)

Continuity (1)