IP Library Granted Patent US 7,763,923
Granted Patent B2
US 7,763,923 · App. 11/322,209 · Granted Jul 27, 2010

Metal-insulator-metal capacitor structure having low voltage dependence

Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
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Quick Facts
Patent No.
US 7,763,923
App. No.
11/322,209
Granted
Jul 27, 2010
Kind
B2
Abstract

A semiconductor capacitor device. A dielectric layer is on a substrate. A stack capacitor structure is disposed in the dielectric layer and comprises first and overlying second MIM capacitors electrically connected in parallel. The first and second MIM capacitors have individual upper and lower electrode plates and different compositions of capacitor dielectric layers.

Claims (31)

1. A semiconductor capacitor device, comprising:

a dielectric layer on a substrate; and

a stack capacitor structure disposed in the dielectric layer, comprising first and overlying second MIM capacitors electrically connected in parallel, wherein the first and second MIM capacitors have individual upper and lower electrode plates and different materials of capacitor dielectric layers completely covered by the corresponding upper electrode plate.

2. The semiconductor capacitor device as claimed in claim 1 , further comprising:

a plurality of first interconnects disposed in the dielectric layer, electrically connecting the upper electrode plate of the first MIM capacitor and the lower electrode plate of the second MIM capacitor; and

a plurality of second interconnects disposed in the dielectric layer, electrically connecting the lower electrode plate of the first MIM capacitor and the upper electrode plate of the second MIM capacitor.

3. The semiconductor capacitor device as claimed in claim 2 , wherein the plurality of the first interconnects underlies the second MIM capacitor and overlaps the capacitor dielectric layer thereof.

4. The semiconductor capacitor device as claimed in claim 2 , wherein the plurality of the first interconnects underlies the second MIM capacitor without overlapping the capacitor dielectric layer thereof.

5. The semiconductor capacitor device as claimed in claim 1 , wherein one of the capacitor dielectric layers comprises silicon oxide and the other comprises a material having a dielectric constant higher than silicon oxide.

6. The semiconductor capacitor device as claimed in claim 1 , wherein one of the capacitor dielectric layers comprises silicon nitride or silicon oxynitride and the other comprises silicon oxide.

7. The semiconductor capacitor device as claimed in claim 1 , wherein the capacitor dielectric layer of the first MIM capacitor has a thickness substantially equal to the capacitor dielectric layer of the second MIM capacitor.

8. The semiconductor capacitor device as claimed in claim 1 , wherein the capacitor dielectric layer of the first MIM capacitor has a thickness different from the capacitor dielectric layer of the second MIM capacitor.

9. The semiconductor capacitor device as claimed in claim 1 , wherein the upper and lower electrode plates of the first and second MIM capacitors comprise Cu or AlCu.

10. The semiconductor capacitor device as claimed in claim 1 , wherein the dielectric layer comprises a low k dielectric material.

11. A semiconductor capacitor device, comprising:

a dielectric layer on a substrate; and

a stack capacitor structure disposed in the dielectric layer, comprising a first MIM capacitor having a capacitor dielectric layer with negative voltage linearity coefficient parabolic characteristic and a second MIM capacitor having a capacitor dielectric layer with positive voltage linearity coefficient parabolic characteristic, electrically connected in parallel, wherein the first and second MIM capacitors have individual upper and lower electrode plates.

12. The semiconductor capacitor device as claimed in claim 11 , further comprising:

a plurality of first interconnects disposed in the dielectric layer, electrically connecting the upper electrode plate of the first MIM capacitor and the lower electrode plate of the second MIM capacitor; and

a plurality of second interconnects disposed in the dielectric layer, electrically connecting the lower electrode plate of the first MIM capacitor and the upper electrode plate of the second MIM capacitor.

13. The semiconductor capacitor device as claimed in claim 12 , wherein the plurality of the first interconnects underlies the second MIM capacitor and overlaps the capacitor dielectric layer thereof.

14. The semiconductor capacitor device as claimed in claim 12 , wherein the plurality of the first interconnects underlies the second MIM capacitor without overlapping the capacitor dielectric layer thereof.

15. The semiconductor capacitor device as claimed in claim 11 , wherein the capacitor dielectric layer of the first MIM capacitor has a thickness substantially equal to the capacitor dielectric layer of the second MIM capacitor.

16. The semiconductor capacitor device as claimed in claim 11 , wherein the capacitor dielectric layer of the first MIM capacitor has a thickness different from the capacitor dielectric layer of the second MIM capacitor.

17. The semiconductor capacitor device as claimed in claim 11 , wherein the capacitor dielectric layer with negative voltage linearity coefficient parabolic characteristic comprises silicon oxide.

18. The semiconductor capacitor device as claimed in claim 11 , wherein the capacitor dielectric layer with positive voltage linearity coefficient parabolic characteristic comprises silicon nitride or silicon oxynitride.

19. A semiconductor capacitor device, comprising:

a dielectric layer on a substrate;

a stack capacitor structure disposed in the dielectric layer, comprising a first MIM capacitor using silicon oxide as a capacitor dielectric layer and a second MIM capacitor using a high k dielectric material as a capacitor dielectric layer, electrically connected in parallel, wherein the first and second MIM capacitors have individual upper and lower electrode plates;

a plurality of first interconnects disposed in the dielectric layer, electrically connecting the upper electrode plate of the first MIM capacitor and the lower electrode plate of the second MIM capacitor; and a plurality of second interconnects disposed in the dielectric layer, electrically connecting the lower electrode plate of the first MIM capacitor and the upper electrode plate of the second MIM capacitor.

20. The semiconductor capacitor device as claimed in claim 19 , wherein the high k dielectric material comprises titanium oxide, barium strontium titanate, zirconium oxide, hafnium silicon oxide, zirconium silicon oxide, hafnium aluminum oxide, zirconium aluminum oxide, or strontium titanium oxide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2006
From: YEH, DER-CHYANG; LIN, CHIE-IUAN; LEE, CHUAN-YING; CHAO, Y.T.; CHEN, MING-HSIEN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 017170/0551 →
Continuity (1)
Related Publication 20070152295A1 · Jul 5, 2007