Multi-row block supporting row level redundancy in a PLD
In a Programmable Logic Device (PLD), a multi-row block that has internal logic connections between rows has redundant internal connections between rows to replace the internal logic connections when a fault occurs. The redundant internal logic connections extend through a row, linking the row above a defective row with a row below the defective row. Elements in a multi-row block are configurable to perform a default function and a function of an element in a neighboring row, if the functions are different.
1. A programmable logic device comprising:
a plurality of rows of elements interconnected by configurable connections;
a plurality of row-redundancy circuits that replace defective rows with non-defective rows;
a multi-row block of elements that includes elements in each of a first row, a second row, and a third row, an internal logic connection between a first element of the first row and a second element of the second row; and
internal redundant connections in the multi-row block, the internal redundant connections including an internal redundant logic connection between the first element and a third element in a third row to replace the internal logic connection between the first element and the second element when the second element is defective.
2. The programmable logic device of claim 1 wherein the first row is immediately above the second row, the second row is immediately above the third row, and the internal logic connection between the first element and the third element extends through the second row in the multi-row block.
3. The programmable logic device of claim 2 wherein the internal redundant connections further include an internal redundant connection between the second element and the third element to replace the internal logic connection between the first element and the second element when the first row is defective.
4. The programmable logic device of claim 1 wherein functions performed by the first, second, and third rows are not identical in a default condition where no defect is present, and configurable elements allow each row to perform its default functions and default functions of an adjacent row.
5. The programmable logic device of claim 1 wherein the multi-row block is a Digital Signal Processing block.
6. The programmable logic device of claim 5 wherein the multi-row block performs multiplication of two numbers.
7. The programmable logic device of claim 6 wherein the multi-row block includes multiplier elements and at least one adder element in each row of the multi-row block.
8. The programmable logic device of claim 7 wherein an adder element in a particular row of the multi-row block receives inputs from multiplier elements in the particular row and receives an input from a multiplier element in another row.
9. A method of operating a multi-row programmable logic device containing a multi-row block, comprising:
determining that a row of the programmable logic device is defective;
rerouting input signals to and output signals from the defective row to an adjacent row;
in the multi-row block that extends across the defective row and the adjacent row, replacing internal logic connections between the defective row and neighboring rows with internal logic connections between the adjacent row and the neighboring rows; and
reconfiguring the elements of the adjacent row to perform functions of the defective row.
10. The method of claim 9 wherein the adjacent row is below the defective row and the rerouting includes rerouting an internal logic connection of the multi-row block from a row above the defective row through the defective row to the adjacent row.
11. The method of claim 9 further comprising rerouting input signals to, and output signals from all rows below the defective row and rerouting all internal logic connections of the multi-row block between rows below the defective row.
12. The method of claim 9 further comprising rerouting input signals to, and output signals from all rows below the defective row and reconfiguring elements in some, but not all of the rows below the defective row.
13. The method of claim 9 wherein the multi-row block is a Digital Signal Processing block.
14. The method of claim 13 wherein the multi-row block performs multiplication of two numbers that are received as inputs to two rows of the multi-row block.
15. A programmable logic device comprising:
a plurality of rows of elements;
a plurality of row-redundancy circuits to replace a defective row with a non-defective row;
a multi-row digital signal processing block that extends through the plurality of rows, the multi-row digital signal processing block performing different functions, using physically different elements, in different rows in the multi-row block; and
a plurality of internal logic connections between rows within the multi-row block, the multi-row block having a plurality of redundant internal logic connections to replace the plurality of internal logic connections when a row of the plurality of rows is replaced by the row-redundancy circuits.
16. The programmable logic device of claim 15 wherein the multi-row block performs multiplication and each row in the multi-row block contains at least a multiplier element and an adder element, each adder element receiving input from a multiplier element in the same row and a multiplier element in a different row.
17. The programmable logic device of claim 15 wherein the multi-row block receives numbers to be multiplied through inputs in two or more rows and provides a result through outputs in two or more rows.
18. The programmable logic device of claim 15 wherein the physically different element include non-configurable elements that perform a single function and configurable elements that perform a first function in a default mode and perform a redundant function in a redundant mode.
19. The programmable logic device of claim 18 wherein the redundant function of an element is the default function of a corresponding element in an adjacent row.