IP Library Granted Patent US 7,810,233
Granted Patent B2
US 7,810,233 · App. 11/545,190 · Granted Oct 12, 2010

System of fabricating a flexible electrode array

Assignee: Lawrence Livermore National Security, LLC
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Quick Facts
Patent No.
US 7,810,233
App. No.
11/545,190
Granted
Oct 12, 2010
Kind
B2
Abstract

An image is captured or otherwise converted into a signal in an artificial vision system. The signal is transmitted to the retina utilizing an implant. The implant consists of a polymer substrate made of a compliant material such as poly(dimethylsiloxane) or PDMS. The polymer substrate is conformable to the shape of the retina. Electrodes and conductive leads are embedded in the polymer substrate. The conductive leads and the electrodes transmit the signal representing the image to the cells in the retina. The signal representing the image stimulates cells in the retina.

Claims (18)

1. A system of fabricating a flexible electrode array, comprising the steps of:

spin-coating a poly(dimethylsiloxane) layer (PDMS) onto a handle wafer that has been pre-coated with a conductive seed layer;

patterning said poly(dimethylsiloxane) layer to expose said conductive seed layer to form electrodes;

plating a material for said electrodes until said electrodes are higher than a thickness of said poly(dimethylsiloxane) layer and until said electrodes form mushroom caps which later will prevent said electrodes from popping out of said poly(dimethylsiloxane) layer when said poly(dimethylsiloxane) layer is removed from said handle wafer; and

patterning conducing lines on said poly(dimethylsiloxane) layer.

2. The system of fabricating a flexible electrode array of claim 1 , wherein said step of patterning conducing lines on said PDMS is conducted using thin film deposition.

3. The system of fabricating a flexible electrode array of claim 1 , wherein said step of patterning conducing lines on said PDMS is conducted using photolithography.

4. The system of fabricating a flexible electrode array of claim 1 , wherein said step of patterning conducing lines on said poly(dimethylsiloxane) layer is conducted using shadow masking.

5. The system of fabricating a flexible electrode array of claim 1 , further comprising a step of directly embedding an electrical connector into said poly(dimethylsiloxane) layer to interface with electronics.

6. The system of fabricating a flexible electrode array of claim 1 , further comprising a step of casting a PDMS capping layer to said PDMS.

7. The system of fabricating a flexible electrode array of claim 1 , further comprising a step of bonding a poly(dimethylsiloxane) capping layer to said poly(dimethylsiloxane) layer.

8. The system of fabricating a flexible electrode array of claim 1 , wherein said conductive seed layer is made of biocompatible.

9. The system of fabricating a flexible electrode array of claim 1 , wherein said conductive seed layer is made of gold.

10. The system of fabricating a flexible electrode array of claim 1 , wherein said conductive seed layer is made of platinum.

11. The system of fabricating a flexible electrode array of claim 1 , wherein said conductive seed layer is made of a conductive polymer material.

12. The system of fabricating a flexible electrode array of claim 1 , wherein in said step of plating a material for said electrodes until said electrodes are higher than the thickness of said poly(dimethylsiloxane) layer and until said electrodes form mushroom caps which later will prevent said electrodes from popping out of said poly(dimethylsiloxane) layer when said poly(dimethylsiloxane) layer is removed from said handle wafer and said electrodes are gold electrodes electroplated onto said conductive seed layer.

13. The system of fabricating a flexible electrode array of claim 1 , wherein the material is made of platinum electroplated onto said conductive seed layer.

14. The system of fabricating a flexible electrode array of claim 1 , further comprising a step of directly embedding an integrated circuit into said poly(dimethylsiloxane) layer such that said integrated circuit interfaces with the electrode array.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 25, 2013
From: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
To: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
Reel/Frame 031667/0127 →
CONFIRMATORY LICENSE Recorded Oct 28, 2013
From: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
To: U.S. DEPARTMENT OF ENERGY
Reel/Frame 031505/0533 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2012
From: HUMAYUN, MARK S.; WEILAND, JAMES D.
To: DOHENY EYE INSTITUTE
Reel/Frame 027578/0463 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2007
From: REGENTS OF THE UNIVERSITY OF CALIFORNIA, THE
To: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
Reel/Frame 020012/0032 →
Continuity (3)
Division 1011567600 · Apr 3, 2002
Continuation 0999224800 · Nov 16, 2001
Related Publication 20070142878A1 · Jun 21, 2007