IP Library Granted Patent US 7,824,980
Granted Patent B2
US 7,824,980 · App. 12/253,250 · Granted Nov 2, 2010

Semiconductor device and method for manufacturing the same

Assignee: Dongbu HiTek Co., Ltd.
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Quick Facts
Patent No.
US 7,824,980
App. No.
12/253,250
Granted
Nov 2, 2010
Kind
B2
Abstract

A semiconductor device and a method for manufacturing the same includes forming a poly-gate including a first poly-gate portion and a second poly-gate portion on and/or over a semiconductor substrate, forming a trench having a predetermined depth in the poly-gate, implanting dopant ions into the entire surface of the semiconductor substrate and the poly-gate including the trench, forming a contact barrier layer to cover a portion of the poly-gate including the trench while exposing an upper surface of the remaining portion of the poly-gate on which a contact will be formed, and forming a contact on the exposed upper surface of the poly-gate.

Claims (41)

1. A method for manufacturing a semiconductor device comprising:

forming a poly-gate having a first poly-gate portion and a second poly-gate portion over a semiconductor substrate; and then

forming a photosensitive layer over the entire surface of the semiconductor substrate including the second poly-gate portion; and then

forming photosensitive layer patterns to expose only the second poly-gate portion; and then

forming a trench at a predetermined depth in the second poly-gate portion bar etching the poly-gate using the photosensitive layer patterns as etching masks; and then

removing the photosensitive layer patterns; and then

implanting dopant ions into the entire surface of the semiconductor substrate and the poly-gate including the trench; and then

forming a contact barrier layer over the second poly-gate portion including the trench while exposing an upper surface of the first poly-gate portion; and then

forming a contact over the exposed upper surface of the first poly-gate portion.

2. The method of claim 1 , further comprising:

forming a lightly doped drain region by implanting ions into the surface of the semiconductor substrate using the poly-gate as a mask; and then

forming a spacer at opposite sidewalls of the poly-gate; and then

forming a silicide layer over the entire surface of the poly-gate including the trench.

3. The method of claim 2 , further comprising, before forming the trench:

forming a source/drain region in the semiconductor substrate at opposite sides of the spacer by implanting dopant ions using the poly-gate as a mask.

4. The method of claim 3 , wherein the type of dopant ions used during forming the source/drain region is determined according to the predetermined depth of the trench.

5. The method of claim 1 , further comprising, before forming the trench:

forming a source/drain region in the semiconductor substrate at opposite sides of the poly-gate by implanting dopant ions using the poly-gate as a mask.

6. The method of claim 1 , wherein an energy level for implantation of dopant ions is determined according to the predetermined depth of the trench.

7. The method of claim 1 , wherein an energy level for implantation of dopant ions and the type of dopant ions are determined according to the predetermined depth of the trench.

8. The method of claim 1 , wherein the predetermined depth of the trench is determined according to an implantation depth of dopant ions.

9. The method of claim 1 , wherein the predetermined depth of the trench is determined according to a resistance of the poly-gate.

10. The method of claim 1 , wherein implanting dopant ions comprises implanting ions of one of phosphorus, boron and antimony ions.

11. A method for manufacturing a semiconductor device comprising:

forming a poly-gate having a first poly-gate portion and a second poly-gate portion over a semiconductor substrate; and then

forming a lightly doped drain region by implanting ions into the surface of the semiconductor substrate using the poly-gate as a mask; and then

forming a spacer at opposite sidewalls of the poly-gate; and then

forming a source/drain region in the semiconductor substrate at opposite sides of the spacer by implanting dopant ions using the poly-gate as a mask,

forming a trench at a predetermined depth in the second poly-gate portion; and then

implanting dopant ions into the entire surface of the semiconductor substrate and the poly-gate including the trench; and then

forming a silicide layer over the entire surface of the poly-gate including the trench; and then

forming a contact barrier layer over the second poly-gate portion including the trench while exposing an upper surface of the first poly-gate portion; and then

forming a contact over the exposed upper surface of the first poly-gate portion,

wherein the type of dopant ions used during forming the source/drain region is determined according to the predetermined depth of the trench.

12. A method for manufacturing a semiconductor device comprising:

forming a poly-gate having a first poly-gate portion and a second poly-gate portion over a semiconductor substrate; and then

forming a trench at a predetermined depth in the second poly-gate portion; and then

implanting dopant ions into the entire surface of the semiconductor substrate and the poly-gate including the trench; and then

forming a contact barrier layer over the second poly-gate portion including the trench while exposing an upper surface of the first poly-gate portion; and then

forming a contact over the exposed upper surface of the first poly-gate portion,

wherein the predetermined depth of the trench is determined according to an implantation depth of dopant ions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2008
From: HWANG, MUN-SUB
To: DONGBU HITEK CO., LTD.
Reel/Frame 021695/0065 →
Priority Claims (1)
KR 10-2007-0110790 · Nov 1, 2007 · national
Continuity (1)
Related Publication 20090115000A1 · May 7, 2009