Power dissipation management for wired transceivers

1. A method for reducing an amount of power consumed by a transceiver, comprising:

determining a length of a cable connecting a physical layer device (PHY) in the transceiver to a link partner; and

switching one or more components of the transceiver to a power saving mode based on the length of the cable such that the amount of power consumed by the transceiver is reduced;

wherein the power saving mode includes reducing a linearity requirement for one or more of: an analog-to-digital converter (ADC) and a digital to analog converter (DAC) in the transceiver.

2. The method of claim 1 , wherein determining comprises using time-domain reflectometry (TDR) techniques.

3. The method of claim 1 , wherein switching one or more components of the transceiver into power saving mode comprises switching on the power saving mode to one or more of:

one or more echo cancellation filters;

one or more crosstalk filters;

one or more equalizers;

a precoder;

a forward error correction (FEC) decoder; and

a FEC coder.

4. The method of claim 3 , wherein the power saving mode further comprises turning off one or more of:

the one or more echo cancellation filters;

the one or more crosstalk filters;

the one or more equalizers;

the precoder;

the FEC coder; and

the FEC decoder.

5. The method of claim 1 , wherein the protocol governing operation of the PHY is IEEE 802.3.

6. The method of claim 1 , wherein one or more components of the transceiver are switched to the power savings mode when the cable length is less than a threshold length.

7. The method of claim 1 , wherein the power saving mode further comprises turning off one or more taps of an echo cancellation filter in the transceiver.

8. The method of claim 1 , wherein the power saving mode further comprises turning off one or more taps of a crosstalk filter in the transceiver.

9. The method of claim 1 , wherein the power saving mode further comprises turning off one or more taps of an equalizer in the transceiver.

10. The method of claim 1 , wherein the power saving mode comprises reducing the resolution of the one or more of:

the ADC; and

the DAC.

11. The method of claim 1 , wherein the power saving mode further comprises reducing a coding length of a FEC coder in the transceiver.

12. The method of claim 1 , wherein the power saving mode further comprises reducing the number of iterations used in an iterative FEC decoding algorithm in the transceiver.

13. The method of claim 1 , wherein the power saving mode further comprises switching a soft decision based FEC decoder to a hard decision based FEC decoder included in the transceiver.

14. A method for reducing power consumed by a transceiver having a plurality of physical layer devices (PHYs) coupled to a corresponding plurality of link partners, comprising:

determining a corresponding cable length to a link partner for each PHY of the plurality of PHYs in the transceiver;

allocating more power to a first set of PHYs in the transceiver having a corresponding cable length above a threshold length, as compared to a second set of PHYs having a corresponding cable length that is less than the threshold length; and

switching at least one PHY in the second set of PHYs to a power saving mode that includes switching from a soft decision based forward error correction (FEC) decoder to a hard decision based FEC decoder.

15. The method of claim 14 , wherein the switching step includes switching one or more components in the at least one PHY to a power saving mode, wherein the one or more components includes at least one of:

an echo cancellation filter;

a crosstalk filter;

an equalizers;

a precoder;

an analog-to-digital converter (ADC); and

a digital-to-analog converter (DAC).

16. The method of claim 14 , wherein the threshold length is 100 meters.

17. The method of claim 14 , wherein the first and second set of PHYs operate independently from each other.