IP Library Granted Patent US 7,877,753
Granted Patent B2
US 7,877,753 · App. 11/651,451 · Granted Jan 25, 2011

Multi-processor system and program for causing computer to execute controlling method of interruption of multi-processor system

Assignee: Seiko Epson Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,877,753
App. No.
11/651,451
Granted
Jan 25, 2011
Kind
B2
Abstract

A multi-processor system with a plurality of unit processors includes: a semaphore setting section for setting semaphores representing preferential right to the competing of resources to be able to be identified to correspond to each of a plurality of the resources; a semaphore request determining section for determining, whether when a first unit processor among said unit processors requests to obtain a semaphore that is set to said semaphore setting section, the request is for requesting a semaphore being obtained by the second unit processor; and an exclusive controlling section for making the request by the first unit processor wait when it is determined that said request is for requesting a semaphore being obtained, and permitting to obtain the requested semaphore when it is determined that said request is for requesting a semaphore other than the semaphore being obtained by the semaphore request determining section.

Claims (18)

1. A multi-processor system with a plurality of unit processors, comprising:

a semaphore setting section for setting a semaphore representing a preferential right to competing of each of a plurality of resources;

a semaphore request determining section for determining, when a first unit processor among said plurality of unit processors requests to obtain the semaphore set by said semaphore setting section, whether the request is for requesting the semaphore obtained by a second unit processor; and

an exclusive controlling section for making the request by the first unit processor wait when the semaphore request determining section determines that said request is for requesting the semaphore obtained by the second unit processor, and for permitting the requested semaphore to be obtained when the semaphore request determining section determines that said request is for requesting a semaphore other than the semaphore obtained by any of the plurality of unit processors,

wherein the semaphore setting section assigns identification information to each of a plurality of semaphores to identify each of the plurality of semaphores, assigns a plurality of the resources to at least one of the plurality of semaphores, and sets an area in a shared memory for each of the plurality of semaphores to manage the plurality of semaphores, and

wherein the semaphore request determining section determines whether or not the semaphore requested by the first unit processor is the semaphore obtained by the second unit processor based on the area in the shared memory.

2. The multi-processor system according to claim 1 , comprising

an interruption prohibiting section for prohibiting at least one of a task switch by dispatch for the first unit processor that is permitted to obtain the semaphore, an interruption requested from outside and an interruption requested by another unit processor.

3. The multi-processor system according to claim 1 , wherein

a unit processor requests to obtain a semaphore to process a task which occurs inside the multi-processor system and a handler which occurs outside the multi-processor system, and said exclusive controlling section causes to wait or permits to obtain a semaphore between semaphore obtaining requests for processing tasks, between a semaphore obtaining request for processing a task and a semaphore obtaining request for processing a handler, and between semaphore obtaining requests for processing handlers.

4. The multi-processor system according to claim 1 , wherein

said first processor is spin-locked when said exclusive controlling means permits to obtain the semaphore requested by said first unit processor.

5. A program for causing a computer to execute a controlling method of an interruption of a multi-processor system to be applied to the multi-processor system with a plurality of unit processors, comprising:

setting a semaphore representing a preferential right to competing of each of a plurality of resources;

determining, when a first unit processor among said plurality of unit processors requests to obtain a semaphore to be identifiable, whether the request is for requesting the semaphore obtained by a second unit processor; and

making the request from the first unit processor wait when it is determined in the determining that said request is for requesting the semaphore obtained by the second unit processor, and for permitting the requested semaphore to be obtained when it is determined in the determining that said request is for requesting a semaphore other than the semaphore obtained by any of the plurality of unit processors;

wherein the setting assigns identification information to each of a plurality of semaphores to identify each of the plurality of semaphores, assigns a plurality of the resources to at least one of the plurality of semaphores, and sets an area in a shared memory for each of the plurality of semaphores to manage the plurality of semaphores, and

wherein the determining determines whether or not the semaphore requested by the first unit processor is the semaphore obtained by the second unit processor based on the area in the shared memory.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2019
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 050197/0212 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2007
From: TODOROKI, AKINARI; TANAKA, KATSUYA
To: SEIKO EPSON CORPORATION
Reel/Frame 019014/0401 →
Priority Claims (1)
JP 2006-007301 · Jan 16, 2006 · national
Continuity (1)
Related Publication 20070168592A1 · Jul 19, 2007