Processor assignment in multi-processor systems
View Patent ↗To assign a plurality of processes to a plurality of processors in a multi-processor computer system, a plurality of processes are attached to a memory segment shared between a plurality of processors. A spin cycle is initiated in the plurality of processes, where initiating the spin cycle causes a processor-intensive operation to be performed by each of the processes, and wherein performing the processor-intensive operation by the processes induces rescheduling to be performed. As part of the rescheduling, one or more of the processes are reassigned among the processors during the spin cycle.
1. A method of assigning a plurality of processes to a plurality of processors in a multi-processor computer system, comprising:
attaching, in the computer system, the plurality of processes to a memory segment shared between the plurality of processors;
initiating, in the computer system, a spin cycle in the plurality of processes, wherein initiating the spin cycle causes a processor-intensive operation to be performed by each of the processes, wherein the spin cycle implements the processor-intensive operation that consumes significant processor resources that causes utilization of the processors to approach 100%, and wherein performing the processor-intensive operation by the processes induces rescheduling to be performed; and
as part of the rescheduling, reassigning, in the computer system, one or more of the processes among the plurality of processors during the spin cycle.
2. The method of claim 1 , wherein attaching the plurality of processes to the shared memory segment comprises creating the shared memory segment for the plurality of processes.
3. The method of claim 2 , further comprising implementing a barrier to the processes before initiating the spin cycle.
4. The method of claim 1 , further comprising binding the processes to the processors to which the processes are assigned or to corresponding nodes containing the processors to which the processes are assigned.
5. The method of claim 4 , further comprising running an oversubscription routine to reassign processes from one or more oversubscribed processors.
6. The method of claim 5 , wherein running the oversubscription routine comprises:
determining a processor load parameter for at least a particular one of the processors; and
reassigning, to a second processor, a particular process previously assigned to the particular processor in response to determining that the processor load parameter exceeds a threshold.
7. The method of claim 6 , wherein reassigning the particular process comprises reassigning the particular process to the second processor having a lower load parameter.
8. The method of claim 7 , further comprising:
determining a node associated with the second processor; and
binding the particular process to the node.
9. The method of claim 1 , wherein reassigning the one or more processes among the plurality of processors comprises reassigning the one or more processes to less busy processors before reassigning to more busy processors.
10. A computer system, comprising:
a first computing node comprising at least one processor and a memory module coupled to the processor;
a second computing node comprising at least one processor and a memory module coupled to the processor in the second computing node;
a communication network coupled to the first computing node and the second computing node;
wherein one or more of the processors in the first and second computing nodes are configured to:
attach a plurality of processes to a memory segment shared between a plurality of the processors in the first and second computing nodes;
initiate a spin cycle in the plurality of processes, wherein initiating the spin cycle causes a processor-intensive operation to be performed by each of the processes, wherein the spin cycle implements the processor-intensive operation that consumes significant processor resources that causes utilization of the processors to approach 100%, and wherein performing the processor-intensive operation by the processes induces rescheduling to be performed; and
as part of the rescheduling, reassign one or more of the processes among the plurality of processors during the spin cycle.
11. The computer system of claim 10 , wherein the shared memory segment is implemented in at least one of the memory modules.
12. The computer system of claim 10 , wherein the one or more processors are configured to implement a barrier to the processes.
13. The computer system of claim 10 , wherein the one or more processors are configured to bind the processes to the processors to which the processes are assigned.
14. The computer system of claim 10 , further comprising an oversubscription routine executable to reassign processes from one or more oversubscribed processors.
15. The computer system of claim 14 , wherein the oversubscription routine is executable to:
determine whether a particular processor is oversubscribed by checking a processor load parameter for the particular processor; and
in response to determining that the processor load parameter exceeds a threshold, reassign, to a second processor, a particular process previously assigned to the particular processor.
16. The computer system of claim 15 , wherein reassigning the particular process comprises reassigning the particular process to the second processor having a lower load parameter.
17. The computer system of claim 16 , wherein the one or more processors are configured to:
determine a node associated with the second processor; and
bind the particular process to the node.
18. The computer system of claim 10 , wherein the one or more processors are configured to bind the processes to corresponding nodes containing the processors to which the processes are assigned.
19. The computer system of claim 10 , wherein reassigning the one or more processes among the plurality of processors comprises reassigning the one or more processes to less busy processors before reassigning to more busy processors.
20. A computer program product comprising logic instructions stored on a computer-readable medium which, when executed by a computer system, assign a plurality of processes to a plurality of processors in the computer system by performing operations, comprising:
attaching the plurality of processes to a memory segment shared between the plurality of processors;
initiating a spin cycle in the plurality of processes, wherein initiating the spin cycle causes a processor-intensive operation to be performed by each of the processes, and wherein performing the processor-intensive operation by the processes induces rescheduling to be performed;
as part of the rescheduling, reassigning one or more of the processes among the plurality of processors during the spin cycle; and
implement a barrier to the processes before initiating the spin cycle.
21. The computer program product of claim 20 , further comprising logic instructions which, when executed by the computer system, configure the computer system to create a shared memory segment for the plurality of processes.
22. The computer program product of claim 20 , further comprising logic instructions which, when executed by the computer system, configure the computer system to bind the processes to the processors to which the processes are assigned.
23. The computer program product of claim 20 , further comprising logic instructions which, when executed by the computer system, configure the computer system to run an oversubscription routine to reassign processes from one or more oversubscribed processors.
24. The computer program product of claim 23 , wherein running the oversubscription routine comprises:
determining a processor load parameter for at least a particular one of the processors; and
reassigning, to a second processor, a particular process previously assigned to the particular processor in response to determining that the processor load parameter exceeds a threshold.
25. The computer program product of claim 24 , wherein reassigning the particular process comprises reassigning the particular process to the second processor having a lower load parameter.
26. The computer program product of claim 25 , further comprising logic instructions which, when executed by the computer system, configure the computer system to:
determine a node associated with the second processor; and
bind the particular process to the node.
27. The computer program product of claim 20 , further comprising logic instructions which, when executed by the computer system, configure the computer system to bind the processes to corresponding nodes containing the processors to which the processes are assigned.
28. The computer program product of claim 20 , wherein the spin cycle implements the processor-intensive operation that consumes significant processor resources that cause utilization of the processors to approach 100%.
29. The computer program product of claim 20 , wherein reassigning the one or more processes among the plurality of processors comprises reassigning the one or more processes to less busy processors before reassigning to more busy processors.