IP Library Granted Patent US 7,923,818
Granted Patent B2
US 7,923,818 · App. 12/094,918 · Granted Apr 12, 2011

Varactor element and low distortion varactor circuit arrangement

Assignee: Technische Universiteit Delft
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Quick Facts
Patent No.
US 7,923,818
App. No.
12/094,918
Granted
Apr 12, 2011
Kind
B2
Abstract

A varactor element having a junction region, in which the depletion capacitance of the varactor element varies when a reverse bias voltage is applied to the varactor element. The varactor element has an exponential depletion capacitance-voltage relation, e.g. obtained by providing a predetermined doping profile in the junction region. The varactor element can be used in a narrow tone spacing varactor stack arrangement, in which two varactor elements are connected in an anti-series configuration. A low impedance path for base band frequency components between a control node and each of two RF connection nodes is provided, while for fundamental and higher order harmonic frequencies, a high impedance path is provided.

Claims (43)

1. A varactor stack circuit arrangement, comprising:

two varactor elements each having two terminals and comprising:

a junction region, in which the depletion capacitance of the varactor element varies when a reverse bias voltage is applied to the varactor element, wherein the varactor element has an exponential depletion capacitance-voltage relation, in which the junction region comprises a single sided junction; the varactor element is provided with a doping profile substantially defined by:

N

(

x

)

=

N

/

(

x

x

low

)

m

wherein N(x) is the varactor element's doping concentration in one dimension as a function of x (for x>x low ), where x is a distance from the single sided junction, N is a predefined doping concentration constant, and m is an exponential factor;

the junction region comprises a filling layer in an interval of distances lower than x low with a doping concentration of N fill lower than the doping concentration at distance x low (N(x low ));and

the two varactor elements are connected in an anti-series configuration, such that a control node is provided by two interconnected terminals and two RF connection nodes by the other terminals.

2. The varactor stack circuit arrangement according to claim 1 , wherein the exponential factor has a value in the range 1.7<m<2.3.

3. The varactor stack circuit arrangement according to claim 1 , wherein the doping profile is substantially equal to N(x) at least in the interval x low . . . x high , in which x low is nearer to the single sided junction than x high .

4. The varactor stack circuit arrangement according to claim 1 , wherein the junction region is a two sided or double sided junction.

5. The varactor stack circuit arrangement according to claim 1 , wherein the two varactor elements are connected by a low impedance material.

6. The varactor stack circuit arrangement according to claim 5 , wherein the low impedance material comprises a back side metallization.

7. The varactor stack circuit arrangement according to claim 5 , wherein the varactor stack circuit arrangement further comprises a center tap impedance connected to the control node, the center tap impedance providing a low impedance path for base band frequency components between the control node and each of the two RF connection nodes.

8. The varactor stack circuit arrangement according to claim 7 , wherein the low impedance path has an impedance lower than the varactor element capacitances for the base-band frequency components.

9. The varactor stack circuit arrangement according to claim 7 , wherein which the base band frequency is the separation frequency of a signal having a narrow tone spacing or the modulation frequency of a modulated (RF) signal.

10. An adaptive or dynamic matching network comprising the varactor stack circuit arrangement according to claim 1 .

11. An adaptive or tunable phase shifter device comprising the varactor stack circuit arrangement according to claim 1 .

12. A direct modulator arrangement comprising the varactor stack circuit arrangement according to claim 1 .

13. An up converting mixer or modulator comprising the varactor stack circuit arrangement according to claim 1 .

14. An RF switch comprising the varactor stack circuit arrangement according to claim 1 .

15. A tunable filter or multiplexer comprising the varactor stack circuit arrangement according to claim 1 .

16. An antenna array system comprising the varactor stack circuit arrangement according to claim 1 .

17. A four port electronic arrangement, comprising two series capacitors and two cross connected capacitors,

wherein one of the two series capacitors is connected between a first input port and a first output port,

the other of the two series capacitors is connected between a second input port and a second output port,

one of the two cross connected capacitors is connected between the first input port and the second output port, and

the other of the two cross connected capacitors is connected between the second input port and the first output port,

further wherein at least the two series capacitors or the two cross connected capacitors comprise the varactor stack circuit arrangement according to claim 1 .

18. The four port electronic arrangement according to claim 17 , further comprising a first shunt inductor connected between the first and second input port, and a second shunt inductor connected between the first and second output port.

19. A direct polar modulator, comprising the four port electronic arrangement according to claim 17 , wherein the first and second output ports are further connected to a series of phase shift sections, each phase shift section comprising the varactor stack circuit arrangement.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2008
From: DE VREEDE, LEONARDUS CORNELIS NICOLAAS
To: TECHNISCHE UNIVERSITEIT DELFT
Reel/Frame 020993/0662 →
Priority Claims (2)
EP 05111219 · Nov 24, 2005 · regional
EP 06114911 · Jun 2, 2006 · regional
Continuity (1)
Related Publication 20080290465A1 · Nov 27, 2008