IP Library Granted Patent US 8,004,096
Granted Patent B2
US 8,004,096 · App. 11/488,640 · Granted Aug 23, 2011

Semiconductor device and a manufacturing method thereof

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 8,004,096
App. No.
11/488,640
Granted
Aug 23, 2011
Kind
B2
Abstract

A semiconductor device and a manufacturing method of the device are disclosed. The semiconductor device includes a substrate that mounts a semiconductor element, a first stiffener, a reinforcement resin member, and a second stiffener for reinforcing the reinforcement resin member.

Claims (24)

1. A semiconductor device comprising:

a substrate;

a semiconductor element that is surface-mounted on the substrate;

a first stiffener arranged in a position surrounding the semiconductor element on the substrate;

a reinforcement member extending between and in contact with the semiconductor element and the first stiffener on the substrate; and

a second stiffener reinforcing the reinforcement member,

wherein the second stiffener is arranged into the reinforcement member between the semiconductor element and the first stiffener such that a bottom surface of the second stiffener is not in contact with the substrate, and a top surface of the second stiffener is lower than at least one of a top surface of the semiconductor element and a top surface of the first stiffener.

2. The semiconductor device as claimed in claim 1 , wherein the second stiffener is made of metal material.

3. The semiconductor device as claimed in claim 2 , wherein the second stiffener is made of one of copper and stainless steel.

4. The semiconductor device as claimed in claim 1 , wherein the first stiffener and the second stiffener are structured such that an upper surface of the semiconductor element is exposed to outside.

5. The semiconductor device as claimed in claim 1 , wherein a thickness of the substrate is between 0.1 mm and 0.5 mm.

6. The semiconductor device as claimed in claim 1 , wherein the second stiffener is arranged separated from the substrate.

7. A manufacturing method of a semiconductor device, comprising:

bonding a first stiffener on a substrate;

surface-mounting a semiconductor element on the substrate, to which substrate the first stiffener has been bonded; and

forming a reinforcement member extended between and in contact with the semiconductor element and the first stiffener on the substrate, and a second stiffener into the reinforcement member for reinforcement of the reinforcement member between the semiconductor element and the first stiffener on the substrate, wherein a top surface of the second stiffener is lower than at least one of a top surface of the semiconductor element and a top surface of the first stiffener.

8. The manufacturing method of the semiconductor device as claimed in claim 7 , wherein the reinforcement member is made of resin which is hardened after the second stiffener is arranged in the resin for reinforcement.

9. A semiconductor device in which a semiconductor element formed on a substrate is protected by a first stiffener that surrounds the semiconductor element, and by a resin disposed between the semiconductor element and the first stiffener, comprising:

a second stiffener dipped in an upper part of the resin between the semiconductor element and the first stiffener while the resin is in a liquid state.

10. The semiconductor device of claim 9 , wherein the second stiffener is not in contact with any of the substrate, the first stiffener and the semiconductor element.

11. The semiconductor device as claimed in claim 1 , wherein the reinforcement member is made of resin.

12. The manufacturing method of the semiconductor device as claimed in claim 7 , wherein the reinforcement member is made of resin.

13. A semiconductor device as claimed in claim 1 , wherein the second stiffener has a corner portion opposing the semiconductor element, which is rounded.

14. The manufacturing method of the semiconductor device as claimed in claim 7 , further comprising rounding a corner portion of the second stiffener which opposes the semiconductor element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 19, 2006
From: FUKUZONO, KENJI
To: FUJITSU LIMITED
Reel/Frame 018116/0509 →
Priority Claims (1)
JP 2006-045625 · Feb 22, 2006 · national
Continuity (1)
Related Publication 20070194464A1 · Aug 23, 2007