IP Library Granted Patent US 8,006,113
Granted Patent B2
US 8,006,113 · App. 12/091,691 · Granted Aug 23, 2011

System and method for controlling voltage level and clock frequency supplied to a system

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Quick Facts
Patent No.
US 8,006,113
App. No.
12/091,691
Granted
Aug 23, 2011
Kind
B2
Abstract

A system that includes at least one component adapted to execute at least one application, characterized by including a controller adapted to receive at least one load indication of at least one component of the system and to selectively alter at least one control parameter of a voltage and clock frequency management scheme; whereas the system is adapted to apply the voltage and clock frequency management scheme. A method for controlling voltage level and clock frequency supplied to a system, the method includes receiving at least one load indication of at least one component of the system; characterized repeating the stages of: selectively altering at least one control parameter of a voltage and clock frequency management scheme; and applying the voltage and clock frequency management scheme.

Claims (39)

1. A method for controlling voltage level and clock frequency supplied to a system, the method comprises:

receiving at least one load indication of at least one component of the system;

repeating the stages of:

receiving at least one additional indication of an error rate, other than the at least one load indication, associated with an application being executed by at least one component of the system;

determining at least one control parameter of a voltage and clock frequency management scheme in response to the at least one additional indication, wherein the at least one control parameter includes a load related threshold;

altering the at least one control parameter of the voltage and clock frequency management scheme; and

applying the voltage and clock frequency management scheme based on the altered at least one control parameter.

2. The method according to claim 1 wherein the determining comprises altering a weight of previous load samples on current decision.

3. The method according to claim 1 , whereas the determining comprises estimating a performance gap.

4. The method according to claim 1 , whereas the determining is responsive to a relationship between a tolerated error rate of the application and an actual error rate of the application.

5. The method according to claim 1 , whereas the determining is responsive to a power estimate of error correction measures.

6. The method according to claim 1 , whereas the determining is responsive to quality of communication channel established with the system.

7. The method according to claim 1 , whereas the determining comprises altering a duration of a voltage and clock signal increment decision period.

8. The method according to claim 1 , further comprising:

receiving at least one additional indication of a quality level associated with an application being executed by at least one component of the system; and

determining the at least one control parameter of the voltage and clock frequency management scheme at least in response to the at least one additional indication.

9. The method according to claim 1 , whereas the altering comprises altering at least one thresholds associated with an exponential moving average load estimate.

10. The method according to claim 1 further comprising receiving at least one additional indication of an amount of errors associated with an application being executed by the at least one component of the system; and determining the at least one control parameter of the voltage and clock frequency management scheme in response to the at least one additional indication of the amount of errors.

11. A system that comprises:

at least one component adapted to execute at least one application,

a controller adapted to repetitively and alter at least one control parameter of a voltage and clock frequency management scheme, wherein the at least one control parameter includes a load related threshold;

whereas the system is adapted to repetitively apply the voltage and clock frequency management scheme based on the altered at least one control parameter;

wherein the system is further adapted to receive at least one indication of an error rate associated with an application being executed by the at least one component of the system and to determine the at least one control parameter of the voltage and clock frequency management scheme at least in response to the at least one indication of the error rate.

12. The system according to claim 11 further adapted to alter wherein the determining comprises altering a weight of previous load samples on current decision.

13. The system according to claim 11 , whereas the system is adapted to estimate a performance gap.

14. The system according to claim 11 , whereas the system is responsive to a relationship between a tolerated error rate of the application and an actual error rate of the application.

15. The system according to claim 11 , whereas the system is responsive to a power estimate of error correction measures.

16. The system according to claim 11 , whereas the system is adapted to alter a length of a voltage and clock signal increment decision period.

17. The system according to claim 11 , whereas the system is adapted to receive at least one indication of a quality level associated with an application being executed by the at least one component of the system; and determine the at least one control parameter of the voltage and clock frequency management scheme at least in response to the at least one indication of the quality level.

18. The system according to claim 11 , whereas the system is adapted to alter at least one threshold associated with an exponential moving average load estimate.

19. The system according to claim 11 further adapted to receive at least one indication of an amount of errors associated with an application being executed by the at least one component of the system and to determine the at least one control parameter of the voltage and clock frequency management scheme at least in response to the at least one indication of the amount of errors.

20. A method for controlling voltage level and clock frequency supplied to a system, the method comprises:

repeating the stages of:

receiving at least one indication of an error rate associated with an application being executed by at least one component of the system;

determining at least one control parameter of a voltage and clock frequency management scheme in response to the at least one indication of the error rate, wherein the at least one control parameter includes a load related threshold;

determining whether the error rate is above or below a target error rate;

in response to determining whether the error rate is above or below the target error rate, if the error rate is below the target error rate, altering the at least one control parameter of the voltage and clock frequency management scheme to apply a more aggressive voltage and clock frequency management scheme as the voltage and clock frequency management scheme;

in response to determining whether the error rate is above or below the target error rate, if the error rate is above the target error rate, altering the at least one control parameter of the voltage and clock frequency management scheme to apply a less aggressive voltage and clock frequency management scheme as the voltage and clock frequency management scheme; and

applying the voltage and clock frequency management scheme based on the altered at least one control parameter.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0719 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2010
From: ROZEN, ANTON; GUBESKYS, ARIK; PRIEL, MICHAEL
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 024018/0586 →
SECURITY AGREEMENT Recorded Sep 24, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 021570/0449 →