IP Library Granted Patent US 8,023,330
Granted Patent B2
US 8,023,330 · App. 12/361,783 · Granted Sep 20, 2011

Method of erasing a nonvolatile memory device

Assignee: Hynix Semiconductor Inc.
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Quick Facts
Patent No.
US 8,023,330
App. No.
12/361,783
Granted
Sep 20, 2011
Kind
B2
Abstract

In a method of erasing a nonvolatile memory device, an erase operation is performed on memory cells of a selected block. A first soft program operation is performed on the cells on which the erase operation has been performed. The erase operation and the first soft program operation are repeatedly performed by increasing an erase voltage by a first step voltage until a threshold voltage of the memory cells becomes lower than a first erase verify voltage. When the threshold voltage of the memory cells becomes lower than the first erase verify voltage, a second soft program operation is performed. The second soft program operation is repeatedly performed by increasing a soft program voltage by a second step voltage until a cell is programmed to have a soft program verify voltage.

Claims (29)

1. A method of erasing a nonvolatile memory device, the method comprising:

performing an erase operation on memory cells of a selected block;

performing a dummy soft program operation on the cells on which the erase operation has been performed;

performing a first erase verify operation that determines whether a threshold voltage of the memory cells is lower than a first erase verify voltage;

repeatedly performing the erase operation and the dummy soft program operation by increasing an erase voltage by a first step voltage until the threshold voltage of the entire memory cells becomes lower than the first erase verify voltage;

in the event that the threshold voltage of the entire memory cells becomes lower than the first erase verify voltage, performing a soft program operation;

performing a soft program verify operation that determines whether the threshold voltage of the memory cells is higher than a soft program verify voltage; and

repeatedly performing the soft program operation by increasing a soft program voltage by a second step voltage until a cell is programmed to have the soft program verify voltage.

2. The method of claim 1 , further comprising:

determining whether the threshold voltage of the memory cells is lower than a second erase verify voltage; and

in the event that a cell has a threshold voltage higher than the second erase verify voltage, treating a block including the cell as a bad block.

3. The method of claim 1 , wherein the repetitive execution of the erase operation and the dummy soft program operation comprises:

in the event that a cell has a threshold voltage higher than the first erase verify voltage, increasing the erase voltage by the first step voltage.

4. The method of claim 1 , wherein the repetitive execution of the soft program operation comprises:

when the threshold voltage of the entire memory cells is lower than the soft program verify voltage, increasing the soft program voltage by the second step voltage.

5. A method of erasing a nonvolatile memory device, the method comprising:

performing a dummy soft program operation on memory cells after an erase operation is performed on the memory cells;

performing a first erase verify operation that determines whether a threshold voltage of the memory cells is lower than a first erase verify voltage;

repeatedly performing the erase operation and the dummy soft program operation by increasing an erase voltage by a first step voltage until the threshold voltage of the entire memory cells becomes lower than the first erase verify voltage;

in the event that the threshold voltage of the entire memory cells becomes lower than the first erase verify voltage, performing a second soft program operation;

performing a soft program verify operation that determines whether the threshold voltage of the memory cells is higher than a soft program verify voltage; and

repeatedly performing the soft program operation by increasing a soft program voltage by a second step voltage until a cell is programmed to have the soft program verify voltage.

6. The method of claim 5 , further comprising:

determining whether the threshold voltage of the memory cells is lower than a second erase verify voltage; and

in the event that a cell has a threshold voltage higher than the second erase verify voltage, treating a block including the cell as a bad block.

7. The method of claim 5 , wherein the repetitive execution of the erase operation and the dummy soft program operation comprises:

in the event that a cell has a threshold voltage higher than the first erase verify voltage, increasing the erase voltage by the first step voltage.

8. The method of claim 5 , wherein the repetitive execution of the soft program operation comprises:

when the threshold voltage of the entire memory cells is lower than the soft program verify voltage, increasing the soft program voltage by the second step voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2009
From: KIM, BEOM SIK; PARK, YOUNG SOO
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 022173/0645 →
Priority Claims (1)
KR 10-2008-0048168 · May 23, 2008 · national
Continuity (1)
Related Publication 20090290423A1 · Nov 26, 2009