Noise prediction-based signal detection and cross-talk mitigation
View Patent ↗In an exemplary embodiment, noise prediction-based data detection is described with respect to a SERDES (serializer/deserializer) backplane primary channel subject to inter-symbol interference (ISI) noise and added cross-talk noise from other channels. Noise prediction-based data detection combines an added error component from inter-symbol interference (ISI) noise and an added error component from cross-talk noise into an overall noise prediction error term and cancels effects of residual ISI and cross-talk for various components of the exemplary embodiment.
1. A method of data detection in a serializer-deserializer (SERDES) system comprising the steps of:
(a) quantizing a received signal to one of a plurality of levels based on an error bound for each level;
(b) generating a tentative error and a tentative decision for the quantized signal by:
(b1) generating a set of tentative errors for the plurality of levels based on the quantized signal for each one of the plurality of levels, and
(b2) selecting one of the set as the tentative error based on the tentative decision;
(c) generating a set of noise-prediction filter tap coefficients for a filter from the tentative error;
(d) applying the tentative error to the filter to generate an error estimate;
(e) adjusting the quantized signal based on the error estimate;
(f) estimating a data value for the adjusted, quantized signal; and
(g) generating a tentative decision for the received signal.
2. The invention of claim 1 , wherein:
the step of quantizing the received signal comprises the steps of (a1) generating a sampling clock to sample the received signal, (a2) generating, with a phase detector, a correction for the phase of the sampling clock with transition data and detected data, and (a3) adjusting the phase of the sampling clock based on the correction, and
the step of generating the correction further comprises the step of applying decision feedback equalization to the transition data and the detected data to generate the correction.
3. The invention of claim 1 , wherein:
step (b) includes the step of generating a tentative decision â t (n);
for step (b), the tentative error e(n) is generated as:
e ( n )= y q ( n )− â t ( n ) y t
from the quantized signal y q (n) and desired target level y t ; and,
for step (d), the error estimate is generated as:
ê ( n )=Σ k=1 Np e ( n−k ) p k ,
from noise-prediction filter taps p(k), 1≦k≦N p , with N p the number of noise-prediction filter taps of the filter.
4. The invention of claim 1 , wherein step (c) generates the noise-prediction filter taps according to a least mean square (LMS) algorithm.
5. The invention of claim 4 , wherein step (c) generates the noise-prediction filter taps with residual error, e r (n):
e r ( n )= e ( n )− ê ( n )
and noise-prediction filter taps p k (n+1) as:
p k ( n+ 1)= p k ( n )−2 μe r ( n ) e ( n−k ).
6. The invention of claim 1 , further comprising the step of demodulating the data value.
7. The invention of claim 1 , wherein step (c) generates the set of noise-prediction taps off-line in accordance with a solution for a set of Yule-Walker equations based on auto-correlation statistics.
8. The invention of claim 1 , further comprising the step of adjusting a sampling clock based on at least one of (i) the adjusted and quantized signal, (ii) the tentative error, (iii) the filtered error, and (iv) the estimated data value.
9. The invention of claim 1 , further comprising the step of generating tap coefficients for a receiver equalizer based on at least one of (i) the adjusted and quantized signal, (ii) the tentative error, (iii) the tentative decision, (iv) the filtered error, and (v) the estimated data value.
10. The invention of claim 1 , further comprising the step of adjusting coefficients for at least one of a transmit filter through a back channel and an automatic gain control circuit based on at least one of the (i) the adjusted and quantized signal, (ii) the tentative error, (iii) the tentative decision, (iv) the filtered error, and (v) the estimated data value.
11. A circuit for data detection in a serializer-deserializer (SERDES) system comprising:
a quantizer configured to quantize a received signal to one of a plurality of levels;
a tentative error generator configured to generate a tentative error and a tentative decision for the quantized signal;
a filter-tap generator configured to generate a set of noise-prediction filter tap coefficients for a filter from the tentative error;
a filter configured to filter the tentative error to generate a filtered error;
a combiner configured to adjust the quantized signal based on the filtered error;
a data detector configured to estimate a data value for the adjusted, quantized signal; and
logic configured to generate a tentative decision for the received signal, wherein:
the quantizer quantizes the received signal for each one of a plurality of levels based on an error bound for each level, and
the tentative error generator generates a set of tentative errors for the plurality of levels based on the quantized signal for each one of the plurality of levels, and selects one of the set as the tentative error based on the tentative decision.
12. The invention of claim 11 , wherein:
the quantizer comprises:
a sampler configured to generates samples from the received signal based on a sampling clock;
a clock/data recovery (CDR) circuit configured to generate the sampling clock; and
a phase detector adapted to generate a phase correction between a phase of the sampling clock and a phase of the received signal, wherein (i) the phase detector generates the phase correction based on transition data and detected data, and (ii) the CDR circuit adjusts the phase of the sampling clock based on the correction, and
the invention further comprises decision feedback equalizer (DFE) logic, wherein the DFE logic is configured to apply decision feedback equalization to the transition data and the detected data to generate the correction.
13. The invention of claim 11 , wherein:
the tentative error generator is configured to generate the tentative error e(n) based on a tentative decision â t (n) as:
e ( n )= y q ( n )− â t ( n ) y t
from the quantized signal y q (n) and desired target level y t ; and,
the error estimate is given by:
ê ( n )=Σ k=1 Np e ( n−k ) p k ,
from noise-prediction filter taps p k , 1≦k≦N p , with N p the number of noise-prediction filter taps of the filter.
14. The invention of claim 11 , wherein filter-tap generator generates the noise-prediction filter taps according to a least mean square (LMS) algorithm.
15. The invention of claim 14 , wherein filter-tap generator generates the noise-prediction filter taps with residual error, e r (n):
e r ( n )= e ( n )− ê ( n )
and noise-prediction filter taps p k (n+1) as:
p k ( n+ 1)= p k ( n )−2 μe r ( n ) e ( n−k ).
16. The invention of claim 11 , further comprising a demodulator configured to demodulate the data value.
17. The invention of claim 11 , wherein the filter-tap generator generates the set of noise-prediction taps off-line in accordance with a solution for a set of Yule-Walker equations based on auto-correlation statistics.
18. The invention of claim 11 , further comprising a clock/data recovery circuit configured to adjust a sampling clock based on at least one of (i) the adjusted and quantized signal, (ii) the tentative error, (iii) the filtered error, and (iv) the estimated data value.
19. The invention of claim 11 , further comprising a clock/data recovery circuit configured to adjust tap coefficients of a receive equalizer based on at least one of (i) the adjusted and quantized signal, (ii) the tentative error, (iii) the tentative decision, (iv) the filtered error, and (v) the estimated data value.
20. The invention of claim 11 , further comprising a clock/data recovery circuit configured to adjust coefficients of a transmit equalizer based on at least one of (i) the adjusted and quantized signal, (ii) the tentative error, (iii) the tentative decision, (iv) the filtered error, and (v) the estimated data value.
21. A method of data detection in a serializer-deserializer (SERDES) system comprising the steps of:
(a) quantizing a received signal to one of a plurality of levels;
(b) generating a tentative error and a tentative decision for the quantized signal;
(c) generating a set of noise-prediction filter tap coefficients for a filter from the tentative error;
(d) applying the tentative error to the filter to generate an error estimate;
(e) adjusting the quantized signal based on the error estimate; and
(f) estimating a data value for the adjusted, quantized signal, wherein:
the step of quantizing the received signal comprises the steps of (a1) generating a sampling clock to sample the received signal, (a2) generating, with a phase detector, a correction for the phase of the sampling clock with transition data and detected data, and (a3) adjusting the phase of the sampling clock based on the correction, and
the step of generating the correction further comprises the step of applying decision feedback equalization to the transition data and the detected data to generate the correction.
22. A method of data detection in a serializer-deserializer (SERDES) system comprising the steps of:
(a) quantizing a received signal to one of a plurality of levels;
(b) generating a tentative error and a tentative decision for the quantized signal;
(c) generating a set of noise-prediction filter tap coefficients for a filter from the tentative error;
(d) applying the tentative error to the filter to generate an error estimate;
(e) adjusting the quantized signal based on the error estimate;
(f) estimating a data value for the adjusted, quantized signal; and
(g) adjusting a sampling clock based on at least one of (i) the adjusted and quantized signal, (ii) the tentative error, (iii) the filtered error, and (iv) the estimated data value.