Structure of thermal resistive layer and the method of forming the same
The prevent invention discloses a structure of thermal resistive layer and the method of forming the same. The thermal resistive structures, formed on a plastic substrate, comprises a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure, and a buffer layer, formed on said porous layer, wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process. With the structure and method disclosed above, making a thin film transistor and forming electronic devices on the plastic substrate in the technology of Low Temperature PolySilicon, i.e. LTPS, without changing any parameters is easy to carry out.
1. A structure of thermal resistive layer formed on a plastic substrate, comprising:
a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure; and
a buffer layer, formed on said porous layer;
a template layer, formed between said plastic substrate and said porous layer, wherein said template layer is a material selected from the group consisting of silicon, titanium, zinc, and aluminum;
wherein said porous layer protects said plastic substrate from damage caused by the heat generated during manufacturing process.
2. The structure according to claim 1 , wherein said oxide of hollow structure is a material selected from the group consisting of silicon oxide, titanium oxide, zinc oxide, and aluminum oxide.
3. The structure according to claim 1 , wherein the shape of said oxide of hollow structure is selected from the group consisting of sphere, column, and disk.
4. The structure according to claim 3 , wherein the distribution of said oxides of hollow structure in column shape are standing on said plastic substrate.
5. The structure according to claim 3 , wherein the distribution of said oxides of hollow structure in column shape are lying flat on said plastic substrate.
6. The structure according to claim 1 , further comprising a conductive layer, formed between said plastic substrate and said template layer.
7. The structure according to claim 1 , wherein said conductive layer is substantially an indium tin oxide.
8. The structure according to claim 1 , further comprising a planarization layer, formed between said porous layer and said buffer layer.
9. The structure according to claim 1 , wherein said planarization layer is a material selected from the group consisting of polymer, and inorganic materials.
10. The structure according to claim 1 , wherein said buffer layer is substantially a silicon oxide.
11. The structure according to claim 1 , further comprising an amorphous layer formed on said buffer layer.
12. The structure according to claim 1 , further comprising a polycrystalline silicon layer formed on said buffer layer.