Semiconductor device and method of manufacturing the same
View Patent ↗The semiconductor device 1 includes interconnect layers 10, 20 , an IC chip 30 , via plugs 42, 44 , a seal resin 50 , and solder balls 60 . The interconnect layer 10 includes a via plug 42 . An end face of the via plug 42 on the side of the interconnect layer 20 is smaller in area than the opposite end face, i.e. the end face on the side of the IC chip 30 . An end face of the via plug 44 on the side of the interconnect layer 10 is smaller in area than the opposite end face, i.e. the end face on the side of the solder balls 60 . The thermal decomposition temperature of the insulating resin 14 constituting the interconnect layer 10 is higher than that of the insulating resin 24 constituting the interconnect layer 20.
1. A semiconductor device comprising:
a first interconnect layer including first interconnects;
a semiconductor chip mounted on a first surface of said first interconnect layer;
a second interconnect layer provided on a second surface of said first interconnect layer opposite to said first surface;
plural first conductive plugs provided in said first interconnect layer, said first conductive plugs extending from respective ones of said first interconnects to said first surface of said first interconnect layer; and
plural second conductive plugs provided in said second interconnect layer, said second conductive plugs extending from respective ones of said first interconnects to a surface of said second interconnect layer opposite to said first interconnect layer;
wherein end faces of said first conductive plugs facing said second interconnect layer are smaller in area than the opposite end faces of said first conductive plugs;
wherein end faces of said second conductive plugs facing said first interconnect layer are smaller in area than the opposite end faces of said second conductive plugs; and
wherein a resin constituting said first interconnect layer has a higher thermal decomposition temperature than a resin constituting said second interconnect layer; and
wherein a minimum interval between said first conductive plugs is narrower than a minimum interval between said second conductive plugs.
2. The semiconductor device according to claim 1 ,
wherein said second interconnect layer includes second interconnects; and
said second conductive plug extends from a respective one of said first interconnects to a respective one of said second interconnects.
3. The semiconductor device according to claim 1 , further comprising a seal resin provided on said first interconnect layer so as to cover a side face of said semiconductor chip.
4. The semiconductor device according to claim 1 ,
wherein said resin constituting said first interconnect layer is a polybenzooxazole or polyimide resin; and
said resin constituting said second interconnect layer is an epoxy resin.