Semiconductor device and method of manufacturing the same
In the present invention, a first circuit pattern 3 composing a semiconductor element is formed on the front side of a substrate 1 , a first insulating layer 2 is formed on the first circuit pattern 3 , solder electrodes 5 for external connection are formed on the first insulating layer 2 , a second insulating layer 6 is formed on the backside of the substrate 1 , a second circuit pattern 7 is formed on the second insulating layer 6 , through vias 8 are formed to connect the first circuit pattern 3 and the second circuit pattern 7 , chip passive components 9 are placed on the second circuit pattern 7 , and the backside of the substrate is integrally molded with epoxy resin 10 such that the epoxy resin 10 covers the chip passive components 9.
1. A semiconductor device, comprising:
a semiconductor substrate;
a first circuit pattern on a first major surface of the semiconductor substrate;
a second circuit pattern on a second major surface on an opposite side of the semiconductor substrate from the first major surface, and in opposed position to the first circuit pattern;
vias through the semiconductor substrate, connecting the first circuit pattern and the second circuit pattern connecting the circuit patterns;
electrodes for external connection on the first circuit pattern; and
passive chip components on the second circuit pattern on the second major surface of the semiconductor substrate,
wherein the second major surface is integrally molded with resin that covers the passive chip components,
the first circuit pattern and the second circuit pattern each constituting a micro-strip line having a continuous shape of one of a spiral, a meander, and a curve, and at least ends of the first and second circuit patterns are electrically connected to each other through a via.
2. The semiconductor device according to claim 1 , wherein the semiconductor substrate is one of a silicon wafer and a GaAs (gallium arsenide) wafer.
3. The semiconductor device according to claim 2 , wherein the passive chip components are connected to the second circuit pattern by one of a solder material and a conductive adhesive, the solder material being selected from Sn—Pb and Sn solder materials, and the conductive adhesive containing metallic powder selected from Ag powder and Cu powder.
4. The semiconductor device according to claim 1 ,
wherein the first major surface is integrally molded with resin partially exposing the electrodes.
5. The semiconductor device according to claim 4 , wherein the semiconductor substrate is one of a silicon wafer and a GaAs (gallium arsenide) wafer.
6. The semiconductor device according to claim 5 , wherein the passive chip components are connected to the second circuit pattern by one of a solder material and a conductive adhesive, and the solder material being selected from Sn—Pb and Sn solder materials, the conductive adhesive containing metallic powder selected from Ag powder and Cu powder.
7. A semiconductor device, comprising:
a semiconductor substrate;
a first circuit pattern on a first major surface of the semiconductor substrate;
a second circuit pattern on a second major surface on an opposite side of the semiconductor substrate from the first major surface;
through vias between the first circuit pattern and the second circuit pattern connecting the circuit patterns through the semiconductor substrate;
electrodes for external connection on the first circuit pattern;
passive chip components on the second circuit pattern on the second major surface of the semiconductor substrate; and
metallic spacers on the second circuit pattern,
wherein the second major surface is integrally molded with resin that covers the passive chip components,
leaving only surfaces of the metallic spacers exposed.
8. The semiconductor device according to claim 7 ,
wherein the semiconductor substrate is one of a silicon wafer and a GaAs (gallium arsenide) wafer.
9. The semiconductor device according to claim 8 , wherein the passive chip components are connected to the second circuit pattern by one of a solder material and a conductive adhesive, the solder material being selected from Sn—Pb and Sn solder materials, and the conductive adhesive containing metallic powder selected from Ag powder and Cu powder.
10. The semiconductor device according to claim 7 , wherein the metallic spacers are copper blocks, and heat generated on the semiconductor substrate is dissipated also from the metal thin film formed on the resin molding surface, through the copper blocks.
11. The semiconductor device according to claim 1 ,
wherein the first circuit pattern and the second circuit pattern are connected so that electric signals on the circuit patterns may travel in the same direction or in opposite directions with the semiconductor substrate between the circuit patterns.
12. A semiconductor device, comprising:
a semiconductor substrate;
a first circuit pattern on a first major surface of the semiconductor substrate;
a second circuit pattern on a second major surface on an opposite side of the semiconductor substrate from the first major surface;
through vias between the first circuit pattern and the second circuit pattern connecting the circuit patterns through the semiconductor substrate;
electrodes for external connection on the first circuit pattern; and
passive chip components on the second circuit pattern on the second major surface of the semiconductor substrate,
wherein the second major surface is integrally molded with resin that covers the passive chip components,
the first circuit pattern comprises a micro-strip line having a continuous shape of one of a spiral, a meander, and a curve,
the semiconductor device further comprises a second land pattern at an opposite position from the first circuit pattern with the semiconductor substrate between the patterns, and
the second land pattern is electrically connected to a ground potential of the first major surface by a through via.
13. The semiconductor device according to claim 12 , wherein the second land pattern has one of a given area and an area as large as a pattern area of the first circuit pattern.
14. The semiconductor device according to claim 12 , wherein the semiconductor substrate is one of a silicon wafer and a GaAs (gallium arsenide) wafer.
15. The semiconductor device according to claim 1 , wherein the semiconductor substrate has a single-layer structure of a thin plate.
16. The semiconductor device according to claim 1 , wherein the electrodes are solder.
17. The semiconductor device according to claim 7 , further comprising
a thin metal film on a resin molding surface on the second major surface.