IP Library Granted Patent US 8,072,186
Granted Patent B2
US 8,072,186 · App. 12/058,728 · Granted Dec 6, 2011

USB charger circuit

Assignee: Addtek Corp.
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Quick Facts
Patent No.
US 8,072,186
App. No.
12/058,728
Granted
Dec 6, 2011
Kind
B2
Abstract

A USB charger circuit includes at least a converter, a control circuitry, a first resistor, a second resistor, an error amplifier, a sense resistor and a diode. The converter has a transistor. The control circuitry is coupled to the transistor. The control circuitry is used for producing a drive signal to the transistor. The first resistor is connected between the output node of the converter and a first node. The second resistor is connected between the first node and a second node. The error amplifier is coupled to receive a voltage divided by the first resistor and the second resistor to compare to a reference voltage. The sense resistor is connected between the second node and ground. The diode is connected between the output node of the converter and a first node.

Claims (7)

1. A USB charger circuit comprising: a converter having a first transistor; a control circuitry coupled to the first transistor, the control circuitry producing a drive signal to the first transistor; a first resistor coupled between an output node of the converter and a first node; a second resistor coupled between the first node and a second node; a second transistor having a gate coupled to a forth node, a source coupled to a third node, and a drain coupled to the second node; an error amplifier coupled to receive a voltage divided by the first resistor and the second resistor to compare to a reference voltage; a sense resistor coupled between the third node and ground; a fifth resistor coupled between the first node and ground; a first diode coupled between the output node of the converter and the first node; a second diode coupled between the output node of the converter and a forth node; and a forth resistor coupled between the forth node and the third node.

2. The USB charger circuit according to claim 1 , wherein the converter is a Sepic converter.

3. The USB charger circuit according to claim 1 , wherein the converter is a buck converter.

4. The USB charger circuit according to claim 1 , wherein the first diode is a zener diode.

5. The USB charger circuit according to claim 1 , wherein the second diode is a zener diode.

6. The USB charger circuit according to claim 1 , wherein the first transistor is a NMOS transistor.

7. The USB charger circuit according to claim 1 , wherein the second transistor is a NMOS transistor.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2021
From: IML INTERNATIONAL
To: IML HONG KONG LIMITED
Reel/Frame 056321/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2012
From: ADDTEK CORP
To: IML INTERNATIONAL
Reel/Frame 027595/0153 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2008
From: WANG, SHIH-YUAN; CHIANG, YUNG-HSIN; HSU, YU-MING
To: ADDTEK CORP.
Reel/Frame 020724/0215 →
Continuity (1)
Related Publication 20090072796A1 · Mar 19, 2009